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author | Andreas Hansson <andreas.hansson@arm.com> | 2014-11-14 03:53:51 -0500 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2014-11-14 03:53:51 -0500 |
commit | 481eb6ae8018d0478c23fda7c5f9f3fa4db8de89 (patch) | |
tree | e9b449bc6a2e7b15255c7a3c2d5984e0a99b452c /src/cpu/minor/fetch1.hh | |
parent | 9ffe0e7ba67ee194db885b96a7ed3630aed03584 (diff) | |
download | gem5-481eb6ae8018d0478c23fda7c5f9f3fa4db8de89.tar.xz |
arm: Fixes based on UBSan and static analysis
Another churn to clean up undefined behaviour, mostly ARM, but some
parts also touching the generic part of the code base.
Most of the fixes are simply ensuring that proper intialisation. One
of the more subtle changes is the return type of the sign-extension,
which is changed to uint64_t. This is to avoid shifting negative
values (undefined behaviour) in the ISA code.
Diffstat (limited to 'src/cpu/minor/fetch1.hh')
-rw-r--r-- | src/cpu/minor/fetch1.hh | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/cpu/minor/fetch1.hh b/src/cpu/minor/fetch1.hh index 45977b310..29e10def5 100644 --- a/src/cpu/minor/fetch1.hh +++ b/src/cpu/minor/fetch1.hh @@ -251,12 +251,6 @@ class Fetch1 : public Named * prediction sequence numbers. */ InstSeqNum predictionSeqNum; - /** The sequence number expected for the next returned cache line. The - * responses queue should be ordered and so, if the front of that queue - * has a lower lineSeqNum than this, lines need to be discarded. If it - * has a higher lineSeqNum, our line hasn't appeared yet */ - InstSeqNum expectedLineSeqNum; - /** Blocked indication for report */ bool blocked; |