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| author | David Guillen Fandos <david.guillen@arm.com> | 2016-06-16 11:45:11 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-11-29 10:00:40 +0000 |
| commit | 2209b35832d63e0367ef5f26e388a162899af21d (patch) | |
| tree | 93f85aed946d3823d3e8935d621e835b171c8064 /src/cpu/minor/fetch2.cc | |
| parent | 3f31abfbc84734dab86734c72bdca778575c26e5 (diff) | |
| download | gem5-2209b35832d63e0367ef5f26e388a162899af21d.tar.xz | |
cpu-minor: Add missing instruction stats
Change-Id: I811b552989caf3601ac65a128dbee6b7bb405d7f
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
[ Updated to use IsVector instruction flag. ]
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/5732
Reviewed-by: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/cpu/minor/fetch2.cc')
| -rw-r--r-- | src/cpu/minor/fetch2.cc | 44 |
1 files changed, 43 insertions, 1 deletions
diff --git a/src/cpu/minor/fetch2.cc b/src/cpu/minor/fetch2.cc index 986f1f2ae..ba898d987 100644 --- a/src/cpu/minor/fetch2.cc +++ b/src/cpu/minor/fetch2.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2014 ARM Limited + * Copyright (c) 2013-2014,2016 ARM Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -415,6 +415,17 @@ Fetch2::evaluate() dyn_inst->pc = fetch_info.pc; DPRINTF(Fetch, "decoder inst %s\n", *dyn_inst); + // Collect some basic inst class stats + if (decoded_inst->isLoad()) + loadInstructions++; + else if (decoded_inst->isStore()) + storeInstructions++; + else if (decoded_inst->isVector()) + vecInstructions++; + else if (decoded_inst->isFloating()) + fpInstructions++; + else if (decoded_inst->isInteger()) + intInstructions++; DPRINTF(Fetch, "Instruction extracted from line %s" " lineWidth: %d output_index: %d inputIndex: %d" @@ -594,6 +605,37 @@ Fetch2::isDrained() } void +Fetch2::regStats() +{ + using namespace Stats; + + intInstructions + .name(name() + ".int_instructions") + .desc("Number of integer instructions successfully decoded") + .flags(total); + + fpInstructions + .name(name() + ".fp_instructions") + .desc("Number of floating point instructions successfully decoded") + .flags(total); + + vecInstructions + .name(name() + ".vec_instructions") + .desc("Number of SIMD instructions successfully decoded") + .flags(total); + + loadInstructions + .name(name() + ".load_instructions") + .desc("Number of memory load instructions successfully decoded") + .flags(total); + + storeInstructions + .name(name() + ".store_instructions") + .desc("Number of memory store instructions successfully decoded") + .flags(total); +} + +void Fetch2::minorTrace() const { std::ostringstream data; |