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| author | Mitch Hayenga <mitch.hayenga@arm.com> | 2015-09-30 11:14:19 -0500 |
|---|---|---|
| committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2015-09-30 11:14:19 -0500 |
| commit | fafa83ed32933fe250d34dfca23fba348429b176 (patch) | |
| tree | 3bf8fd636f1e879273045fefda3b5d7319a38479 /src/cpu/minor/lsq.cc | |
| parent | 582a0148b441fe9f4a6f977094c5ce6bf7ab6313 (diff) | |
| download | gem5-fafa83ed32933fe250d34dfca23fba348429b176.tar.xz | |
cpu: Add per-thread monitors
Adds per-thread address monitors to support FullSystem SMT.
Diffstat (limited to 'src/cpu/minor/lsq.cc')
| -rw-r--r-- | src/cpu/minor/lsq.cc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/cpu/minor/lsq.cc b/src/cpu/minor/lsq.cc index 376e8a0ff..e644951f8 100644 --- a/src/cpu/minor/lsq.cc +++ b/src/cpu/minor/lsq.cc @@ -1501,7 +1501,8 @@ LSQ::pushRequest(MinorDynInstPtr inst, bool isLoad, uint8_t *data, if (inst->traceData) inst->traceData->setMem(addr, size, flags); - request->request.setThreadContext(cpu.cpuId(), /* thread id */ 0); + int cid = cpu.threads[inst->id.threadId]->getTC()->contextId(); + request->request.setThreadContext(cid, /* thread id */ 0); request->request.setVirt(0 /* asid */, addr, size, flags, cpu.dataMasterId(), /* I've no idea why we need the PC, but give it */ |