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author | Mitch Hayenga <mitch.hayenga@arm.com> | 2016-07-21 17:19:16 +0100 |
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committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2016-07-21 17:19:16 +0100 |
commit | ff4009ac005be0347015f8ba5a8e37a3aa930e69 (patch) | |
tree | b80cfa7c70c0e39f54c8c3d78527722cb6658510 /src/cpu/minor/pipe_data.hh | |
parent | 8a476d387c84f037d0ccf3cc20dc88870ab45fec (diff) | |
download | gem5-ff4009ac005be0347015f8ba5a8e37a3aa930e69.tar.xz |
cpu: Add SMT support to MinorCPU
This patch adds SMT support to the MinorCPU. Currently
RoundRobin or Random thread scheduling are supported.
Change-Id: I91faf39ff881af5918cca05051829fc6261f20e3
Diffstat (limited to 'src/cpu/minor/pipe_data.hh')
-rw-r--r-- | src/cpu/minor/pipe_data.hh | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/src/cpu/minor/pipe_data.hh b/src/cpu/minor/pipe_data.hh index 4468cb89e..e514be2f9 100644 --- a/src/cpu/minor/pipe_data.hh +++ b/src/cpu/minor/pipe_data.hh @@ -91,8 +91,6 @@ class BranchData /* : public ReportIF, public BubbleIF */ * count it as stream changing itself and expect pc to be the PC * of the next instruction */ SuspendThread, - /* Wakeup fetching from Halted */ - WakeupFetch, /* Branch from an interrupt (no instruction) */ Interrupt, /* Stop fetching in anticipation of of draining */ @@ -112,6 +110,9 @@ class BranchData /* : public ReportIF, public BubbleIF */ /** Explanation for this branch */ Reason reason; + /** ThreadID associated with branch */ + ThreadID threadId; + /** Sequence number of new stream/prediction to be adopted */ InstSeqNum newStreamSeqNum; InstSeqNum newPredictionSeqNum; @@ -124,18 +125,20 @@ class BranchData /* : public ReportIF, public BubbleIF */ public: BranchData() : - reason(NoBranch), newStreamSeqNum(0), + reason(NoBranch), threadId(InvalidThreadID), newStreamSeqNum(0), newPredictionSeqNum(0), target(TheISA::PCState(0)), inst(MinorDynInst::bubble()) { } BranchData( Reason reason_, + ThreadID thread_id, InstSeqNum new_stream_seq_num, InstSeqNum new_prediction_seq_num, TheISA::PCState target, MinorDynInstPtr inst_) : reason(reason_), + threadId(thread_id), newStreamSeqNum(new_stream_seq_num), newPredictionSeqNum(new_prediction_seq_num), target(target), @@ -258,8 +261,12 @@ class ForwardInstData /* : public ReportIF, public BubbleIF */ /** The number of insts slots that can be expected to be valid insts */ unsigned int numInsts; + /** Thread associated with these instructions */ + ThreadID threadId; + public: - explicit ForwardInstData(unsigned int width = 0); + explicit ForwardInstData(unsigned int width = 0, + ThreadID tid = InvalidThreadID); ForwardInstData(const ForwardInstData &src); |