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authorNikos Nikoleris <nikos.nikoleris@arm.com>2016-08-15 12:00:35 +0100
committerNikos Nikoleris <nikos.nikoleris@arm.com>2016-08-15 12:00:35 +0100
commit698767e5384a664b3bad52c9b40d62daf0eabbfc (patch)
tree2cb02cf387574c233367bfd6602b9ac271815384 /src/cpu/minor
parent608a37c844829715c2a15ef079f7dd8db428779b (diff)
downloadgem5-698767e5384a664b3bad52c9b40d62daf0eabbfc.tar.xz
cpu, arch: fix the type used for the request flags
Change-Id: I183b9942929c873c3272ce6d1abd4ebc472c7132 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/cpu/minor')
-rw-r--r--src/cpu/minor/exec_context.hh5
-rw-r--r--src/cpu/minor/lsq.cc3
-rw-r--r--src/cpu/minor/lsq.hh3
3 files changed, 7 insertions, 4 deletions
diff --git a/src/cpu/minor/exec_context.hh b/src/cpu/minor/exec_context.hh
index a5d646b6c..4a56c01fe 100644
--- a/src/cpu/minor/exec_context.hh
+++ b/src/cpu/minor/exec_context.hh
@@ -58,6 +58,7 @@
#include "cpu/minor/pipeline.hh"
#include "cpu/base.hh"
#include "cpu/simple_thread.hh"
+#include "mem/request.hh"
#include "debug/MinorExecute.hh"
namespace Minor
@@ -103,7 +104,7 @@ class ExecContext : public ::ExecContext
}
Fault
- initiateMemRead(Addr addr, unsigned int size, unsigned int flags)
+ initiateMemRead(Addr addr, unsigned int size, Request::Flags flags)
{
execute.getLSQ().pushRequest(inst, true /* load */, nullptr,
size, addr, flags, NULL);
@@ -112,7 +113,7 @@ class ExecContext : public ::ExecContext
Fault
writeMem(uint8_t *data, unsigned int size, Addr addr,
- unsigned int flags, uint64_t *res)
+ Request::Flags flags, uint64_t *res)
{
execute.getLSQ().pushRequest(inst, false /* store */, data,
size, addr, flags, res);
diff --git a/src/cpu/minor/lsq.cc b/src/cpu/minor/lsq.cc
index 5995a52c2..476f9d474 100644
--- a/src/cpu/minor/lsq.cc
+++ b/src/cpu/minor/lsq.cc
@@ -1471,7 +1471,8 @@ LSQ::needsToTick()
void
LSQ::pushRequest(MinorDynInstPtr inst, bool isLoad, uint8_t *data,
- unsigned int size, Addr addr, unsigned int flags, uint64_t *res)
+ unsigned int size, Addr addr, Request::Flags flags,
+ uint64_t *res)
{
bool needs_burst = transferNeedsBurst(addr, size, lineWidth);
LSQRequestPtr request;
diff --git a/src/cpu/minor/lsq.hh b/src/cpu/minor/lsq.hh
index e0b72177c..1a9094806 100644
--- a/src/cpu/minor/lsq.hh
+++ b/src/cpu/minor/lsq.hh
@@ -712,7 +712,8 @@ class LSQ : public Named
/** Single interface for readMem/writeMem to issue requests into
* the LSQ */
void pushRequest(MinorDynInstPtr inst, bool isLoad, uint8_t *data,
- unsigned int size, Addr addr, unsigned int flags, uint64_t *res);
+ unsigned int size, Addr addr, Request::Flags flags,
+ uint64_t *res);
/** Push a predicate failed-representing request into the queues just
* to maintain commit order */