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author | Mitch Hayenga <mitch.hayenga@arm.com> | 2015-09-30 11:14:19 -0500 |
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committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2015-09-30 11:14:19 -0500 |
commit | a5c4eb3de9deb3a71a6a5230a25ff5962e584980 (patch) | |
tree | 874b659c6a5eaa1316cde9eb82ec7d08badf638a /src/cpu/minor | |
parent | e255fa053f8d105de8d188077a318124a3aad9ce (diff) | |
download | gem5-a5c4eb3de9deb3a71a6a5230a25ff5962e584980.tar.xz |
isa,cpu: Add support for FS SMT Interrupts
Adds per-thread interrupt controllers and thread/context logic
so that interrupts properly get routed in SMT systems.
Diffstat (limited to 'src/cpu/minor')
-rw-r--r-- | src/cpu/minor/execute.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc index 001515eff..0a2c4b8c8 100644 --- a/src/cpu/minor/execute.cc +++ b/src/cpu/minor/execute.cc @@ -403,12 +403,12 @@ Execute::takeInterrupt(ThreadID thread_id, BranchData &branch) DPRINTF(MinorInterrupt, "Considering interrupt status from PC: %s\n", cpu.getContext(thread_id)->pcState()); - Fault interrupt = cpu.getInterruptController()->getInterrupt + Fault interrupt = cpu.getInterruptController(thread_id)->getInterrupt (cpu.getContext(thread_id)); if (interrupt != NoFault) { /* The interrupt *must* set pcState */ - cpu.getInterruptController()->updateIntrInfo + cpu.getInterruptController(thread_id)->updateIntrInfo (cpu.getContext(thread_id)); interrupt->invoke(cpu.getContext(thread_id)); @@ -1391,7 +1391,7 @@ Execute::evaluate() /* If there was an interrupt signalled, was it acted on now? */ bool took_interrupt = false; - if (cpu.getInterruptController()) { + if (cpu.getInterruptController(0)) { /* This is here because it seems that after drainResume the * interrupt controller isn't always set */ interrupted = drainState == NotDraining && isInterrupted(0); |