diff options
author | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-09-20 17:18:35 -0400 |
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committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-09-20 17:18:35 -0400 |
commit | e1403fc2af61c224c573c47c77a36f9b1b78e7df (patch) | |
tree | 07647bb8697ac256d180bf8de35080eee2a63f3e /src/cpu/minor | |
parent | 2b0438a11eb6a9640b06da91e8a300d0ac3ad81a (diff) | |
download | gem5-e1403fc2af61c224c573c47c77a36f9b1b78e7df.tar.xz |
alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate
activate(), suspend(), and halt() used on thread contexts had an optional
delay parameter. However this parameter was often ignored. Also, when used,
the delay was seemily arbitrarily set to 0 or 1 cycle (no other delays were
ever specified). This patch removes the delay parameter and 'Events'
associated with them across all ISAs and cores. Unused activate logic
is also removed.
Diffstat (limited to 'src/cpu/minor')
-rw-r--r-- | src/cpu/minor/cpu.cc | 30 | ||||
-rw-r--r-- | src/cpu/minor/cpu.hh | 19 |
2 files changed, 11 insertions, 38 deletions
diff --git a/src/cpu/minor/cpu.cc b/src/cpu/minor/cpu.cc index f7007f6ff..45817c3a8 100644 --- a/src/cpu/minor/cpu.cc +++ b/src/cpu/minor/cpu.cc @@ -63,7 +63,6 @@ MinorCPU::MinorCPU(MinorCPUParams *params) : } threads.push_back(thread); - threadActivateEvents.push_back(new ThreadActivateEvent(*this, 0)); thread->setStatus(ThreadContext::Halted); @@ -87,7 +86,6 @@ MinorCPU::~MinorCPU() for (ThreadID thread_id = 0; thread_id < threads.size(); thread_id++) { delete threads[thread_id]; - delete threadActivateEvents[thread_id]; } } @@ -192,6 +190,9 @@ MinorCPU::startup() for (auto i = threads.begin(); i != threads.end(); i ++) (*i)->startup(); + + /* CPU state setup, activate initial context */ + activateContext(0); } unsigned int @@ -275,31 +276,20 @@ MinorCPU::takeOverFrom(BaseCPU *old_cpu) } void -MinorCPU::activateContext(ThreadID thread_id, Cycles delay) -{ - DPRINTF(MinorCPU, "ActivateContext thread: %d delay: %d\n", - thread_id, delay); - - if (!threadActivateEvents[thread_id]->scheduled()) { - schedule(threadActivateEvents[thread_id], clockEdge(delay)); - } -} - -void -MinorCPU::ThreadActivateEvent::process() +MinorCPU::activateContext(ThreadID thread_id) { - DPRINTFS(MinorCPU, (&cpu), "Activating thread: %d\n", thread_id); + DPRINTF(MinorCPU, "ActivateContext thread: %d", thread_id); /* Do some cycle accounting. lastStopped is reset to stop the * wakeup call on the pipeline from adding the quiesce period * to BaseCPU::numCycles */ - cpu.stats.quiesceCycles += cpu.pipeline->cyclesSinceLastStopped(); - cpu.pipeline->resetLastStopped(); + stats.quiesceCycles += pipeline->cyclesSinceLastStopped(); + pipeline->resetLastStopped(); /* Wake up the thread, wakeup the pipeline tick */ - cpu.threads[thread_id]->activate(); - cpu.wakeupOnEvent(Minor::Pipeline::CPUStageId); - cpu.pipeline->wakeupFetch(); + threads[thread_id]->activate(); + wakeupOnEvent(Minor::Pipeline::CPUStageId); + pipeline->wakeupFetch(); } void diff --git a/src/cpu/minor/cpu.hh b/src/cpu/minor/cpu.hh index 80f41b5d2..507261fbd 100644 --- a/src/cpu/minor/cpu.hh +++ b/src/cpu/minor/cpu.hh @@ -78,23 +78,6 @@ typedef SimpleThread MinorThread; class MinorCPU : public BaseCPU { protected: - /** Event for delayed wakeup of a thread */ - class ThreadActivateEvent : public Event - { - public: - MinorCPU &cpu; - ThreadID thread_id; - - ThreadActivateEvent(MinorCPU &cpu_, ThreadID thread_id_) : - cpu(cpu_), thread_id(thread_id_) - { } - - void process(); - }; - - /** Events to wakeup each thread */ - std::vector<ThreadActivateEvent *> threadActivateEvents; - /** pipeline is a container for the clockable pipeline stage objects. * Elements of pipeline call TheISA to implement the model. */ Minor::Pipeline *pipeline; @@ -184,7 +167,7 @@ class MinorCPU : public BaseCPU void takeOverFrom(BaseCPU *old_cpu); /** Thread activation interface from BaseCPU. */ - void activateContext(ThreadID thread_id, Cycles delay); + void activateContext(ThreadID thread_id); void suspendContext(ThreadID thread_id); /** Interface for stages to signal that they have become active after |