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authorAndreas Hansson <andreas.hansson@arm.com>2014-11-14 03:53:51 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2014-11-14 03:53:51 -0500
commit481eb6ae8018d0478c23fda7c5f9f3fa4db8de89 (patch)
treee9b449bc6a2e7b15255c7a3c2d5984e0a99b452c /src/cpu/minor
parent9ffe0e7ba67ee194db885b96a7ed3630aed03584 (diff)
downloadgem5-481eb6ae8018d0478c23fda7c5f9f3fa4db8de89.tar.xz
arm: Fixes based on UBSan and static analysis
Another churn to clean up undefined behaviour, mostly ARM, but some parts also touching the generic part of the code base. Most of the fixes are simply ensuring that proper intialisation. One of the more subtle changes is the return type of the sign-extension, which is changed to uint64_t. This is to avoid shifting negative values (undefined behaviour) in the ISA code.
Diffstat (limited to 'src/cpu/minor')
-rw-r--r--src/cpu/minor/decode.cc3
-rw-r--r--src/cpu/minor/fetch1.hh6
-rw-r--r--src/cpu/minor/fetch2.cc3
3 files changed, 4 insertions, 8 deletions
diff --git a/src/cpu/minor/decode.cc b/src/cpu/minor/decode.cc
index e380f0d2d..533ebd7d3 100644
--- a/src/cpu/minor/decode.cc
+++ b/src/cpu/minor/decode.cc
@@ -60,7 +60,8 @@ Decode::Decode(const std::string &name,
inputBuffer(name + ".inputBuffer", "insts", params.decodeInputBufferSize),
inputIndex(0),
inMacroop(false),
- execSeqNum(InstId::firstExecSeqNum)
+ execSeqNum(InstId::firstExecSeqNum),
+ blocked(false)
{
if (outputWidth < 1)
fatal("%s: executeInputWidth must be >= 1 (%d)\n", name, outputWidth);
diff --git a/src/cpu/minor/fetch1.hh b/src/cpu/minor/fetch1.hh
index 45977b310..29e10def5 100644
--- a/src/cpu/minor/fetch1.hh
+++ b/src/cpu/minor/fetch1.hh
@@ -251,12 +251,6 @@ class Fetch1 : public Named
* prediction sequence numbers. */
InstSeqNum predictionSeqNum;
- /** The sequence number expected for the next returned cache line. The
- * responses queue should be ordered and so, if the front of that queue
- * has a lower lineSeqNum than this, lines need to be discarded. If it
- * has a higher lineSeqNum, our line hasn't appeared yet */
- InstSeqNum expectedLineSeqNum;
-
/** Blocked indication for report */
bool blocked;
diff --git a/src/cpu/minor/fetch2.cc b/src/cpu/minor/fetch2.cc
index 4827b75fc..cb45f16e3 100644
--- a/src/cpu/minor/fetch2.cc
+++ b/src/cpu/minor/fetch2.cc
@@ -76,7 +76,8 @@ Fetch2::Fetch2(const std::string &name,
lastStreamSeqNum(InstId::firstStreamSeqNum),
fetchSeqNum(InstId::firstFetchSeqNum),
expectedStreamSeqNum(InstId::firstStreamSeqNum),
- predictionSeqNum(InstId::firstPredictionSeqNum)
+ predictionSeqNum(InstId::firstPredictionSeqNum),
+ blocked(false)
{
if (outputWidth < 1)
fatal("%s: decodeInputWidth must be >= 1 (%d)\n", name, outputWidth);