cpu: Get rid of the (read|set)RegOtherThread methods.

These are implemented by MIPS internally now.

Change-Id: If7465e1666e51e1314968efb56a5a814e62ee2d1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18436
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>

1 files changed, 0 insertions, 45 deletions

diff --git a/src/cpu/minor/exec_context.hh b/src/cpu/minor/exec_context.hh
index 02b3dae1c..4ac621aea 100644
--- a/src/cpu/minor/exec_context.hh
+++ b/src/cpu/minor/exec_context.hh
@@ -441,51 +441,6 @@ class ExecContext : public ::ExecContext
 
     BaseCPU *getCpuPtr() { return &cpu; }
 
-    /* MIPS: other thread register reading/writing */
-    RegVal
-    readRegOtherThread(const RegId &reg, ThreadID tid=InvalidThreadID)
-    {
-        SimpleThread *other_thread = (tid == InvalidThreadID
-            ? &thread : cpu.threads[tid]);
-
-        switch (reg.classValue()) {
-            case IntRegClass:
-                return other_thread->readIntReg(reg.index());
-                break;
-            case FloatRegClass:
-                return other_thread->readFloatReg(reg.index());
-                break;
-            case MiscRegClass:
-                return other_thread->readMiscReg(reg.index());
-            default:
-                panic("Unexpected reg class! (%s)",
-                      reg.className());
-                return 0;
-        }
-    }
-
-    void
-    setRegOtherThread(const RegId &reg, RegVal val,
-                      ThreadID tid=InvalidThreadID)
-    {
-        SimpleThread *other_thread = (tid == InvalidThreadID
-            ? &thread : cpu.threads[tid]);
-
-        switch (reg.classValue()) {
-            case IntRegClass:
-                return other_thread->setIntReg(reg.index(), val);
-                break;
-            case FloatRegClass:
-                return other_thread->setFloatReg(reg.index(), val);
-                break;
-            case MiscRegClass:
-                return other_thread->setMiscReg(reg.index(), val);
-            default:
-                panic("Unexpected reg class! (%s)",
-                      reg.className());
-        }
-    }
-
   public:
     // monitor/mwait funtions
     void armMonitor(Addr address) override