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authorGabe Black <gabeblack@google.com>2018-11-21 16:20:57 -0800
committerGabe Black <gabeblack@google.com>2019-02-01 01:22:19 +0000
commita119a963240a35ab66a5baee3f77cfcd99c6bbbb (patch)
treec883d37ed479e92c23d881a48b8f2abec469faf7 /src/cpu/minor
parentfbdf0b689eb31543292f52c71d14152d8ff1156a (diff)
downloadgem5-a119a963240a35ab66a5baee3f77cfcd99c6bbbb.tar.xz
cpu, arch: Replace the CCReg type with RegVal.
Most architectures weren't using the CCReg type, and in x86 and arm it was already a uint64_t. Change-Id: I0b3d5e690e6b31db6f2627f449c89bde0f6750a6 Reviewed-on: https://gem5-review.googlesource.com/c/14515 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/cpu/minor')
-rw-r--r--src/cpu/minor/exec_context.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/minor/exec_context.hh b/src/cpu/minor/exec_context.hh
index 051cf412c..34bd71dfb 100644
--- a/src/cpu/minor/exec_context.hh
+++ b/src/cpu/minor/exec_context.hh
@@ -401,7 +401,7 @@ class ExecContext : public ::ExecContext
thread.getDTBPtr()->demapPage(vaddr, asn);
}
- TheISA::CCReg
+ RegVal
readCCRegOperand(const StaticInst *si, int idx) override
{
const RegId& reg = si->srcRegIdx(idx);
@@ -410,7 +410,7 @@ class ExecContext : public ::ExecContext
}
void
- setCCRegOperand(const StaticInst *si, int idx, TheISA::CCReg val) override
+ setCCRegOperand(const StaticInst *si, int idx, RegVal val) override
{
const RegId& reg = si->destRegIdx(idx);
assert(reg.isCCReg());