diff options
| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-11-27 15:48:22 +0000 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-12-11 15:07:52 +0000 |
| commit | c3bd8eb1214cbebbc92c7958b80aa06913bce3ba (patch) | |
| tree | 6df53d30662ba49d93a1b90e3bfd1826bdb6726e /src/cpu/minor | |
| parent | f73caae20fed7b4500a724ac85c20b637ee353a1 (diff) | |
| download | gem5-c3bd8eb1214cbebbc92c7958b80aa06913bce3ba.tar.xz | |
cpu: Fix coding style (byteEnable->byte_enable)
Change-Id: I2206559c6c2a6e6a0452e9c7d9964792afa9f358
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23282
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/cpu/minor')
| -rw-r--r-- | src/cpu/minor/exec_context.hh | 14 | ||||
| -rw-r--r-- | src/cpu/minor/lsq.cc | 10 | ||||
| -rw-r--r-- | src/cpu/minor/lsq.hh | 2 |
3 files changed, 13 insertions, 13 deletions
diff --git a/src/cpu/minor/exec_context.hh b/src/cpu/minor/exec_context.hh index 9b347b225..4cc41c6c8 100644 --- a/src/cpu/minor/exec_context.hh +++ b/src/cpu/minor/exec_context.hh @@ -113,23 +113,23 @@ class ExecContext : public ::ExecContext Fault initiateMemRead(Addr addr, unsigned int size, Request::Flags flags, - const std::vector<bool>& byteEnable = std::vector<bool>()) - override + const std::vector<bool>& byte_enable = + std::vector<bool>()) override { - assert(byteEnable.empty() || byteEnable.size() == size); + assert(byte_enable.empty() || byte_enable.size() == size); return execute.getLSQ().pushRequest(inst, true /* load */, nullptr, - size, addr, flags, nullptr, nullptr, byteEnable); + size, addr, flags, nullptr, nullptr, byte_enable); } Fault writeMem(uint8_t *data, unsigned int size, Addr addr, Request::Flags flags, uint64_t *res, - const std::vector<bool>& byteEnable = std::vector<bool>()) + const std::vector<bool>& byte_enable = std::vector<bool>()) override { - assert(byteEnable.empty() || byteEnable.size() == size); + assert(byte_enable.empty() || byte_enable.size() == size); return execute.getLSQ().pushRequest(inst, false /* store */, data, - size, addr, flags, res, nullptr, byteEnable); + size, addr, flags, res, nullptr, byte_enable); } Fault diff --git a/src/cpu/minor/lsq.cc b/src/cpu/minor/lsq.cc index 629d89dc6..dea776c9e 100644 --- a/src/cpu/minor/lsq.cc +++ b/src/cpu/minor/lsq.cc @@ -295,9 +295,9 @@ LSQ::SingleDataRequest::startAddrTranslation() ThreadContext *thread = port.cpu.getContext( inst->id.threadId); - const auto &byteEnable = request->getByteEnable(); - if (byteEnable.size() == 0 || - isAnyActiveElement(byteEnable.cbegin(), byteEnable.cend())) { + const auto &byte_enable = request->getByteEnable(); + if (byte_enable.size() == 0 || + isAnyActiveElement(byte_enable.cbegin(), byte_enable.cend())) { port.numAccessesInDTLB++; setState(LSQ::LSQRequest::InTranslation); @@ -1574,7 +1574,7 @@ Fault LSQ::pushRequest(MinorDynInstPtr inst, bool isLoad, uint8_t *data, unsigned int size, Addr addr, Request::Flags flags, uint64_t *res, AtomicOpFunctorPtr amo_op, - const std::vector<bool>& byteEnable) + const std::vector<bool>& byte_enable) { assert(inst->translationFault == NoFault || inst->inLSQ); @@ -1636,7 +1636,7 @@ LSQ::pushRequest(MinorDynInstPtr inst, bool isLoad, uint8_t *data, addr, size, flags, cpu.dataMasterId(), /* I've no idea why we need the PC, but give it */ inst->pc.instAddr(), std::move(amo_op)); - request->request->setByteEnable(byteEnable); + request->request->setByteEnable(byte_enable); requests.push(request); inst->inLSQ = true; diff --git a/src/cpu/minor/lsq.hh b/src/cpu/minor/lsq.hh index c4baad826..6b982083c 100644 --- a/src/cpu/minor/lsq.hh +++ b/src/cpu/minor/lsq.hh @@ -709,7 +709,7 @@ class LSQ : public Named Fault pushRequest(MinorDynInstPtr inst, bool isLoad, uint8_t *data, unsigned int size, Addr addr, Request::Flags flags, uint64_t *res, AtomicOpFunctorPtr amo_op, - const std::vector<bool>& byteEnable = + const std::vector<bool>& byte_enable = std::vector<bool>()); /** Push a predicate failed-representing request into the queues just |