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authorGabe Black <gblack@eecs.umich.edu>2009-07-19 23:54:56 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-07-19 23:54:56 -0700
commit3e8e813218e7779a41bc12caae33db5e239506c9 (patch)
tree289f443de0f36590952706257e633132573b1493 /src/cpu/nativetrace.hh
parenta3a795769a2590451731f683ba11110f4035ab6b (diff)
downloadgem5-3e8e813218e7779a41bc12caae33db5e239506c9.tar.xz
CPU: Separate out native trace into ISA (in)dependent code and SimObjects.
--HG-- rename : src/cpu/nativetrace.cc => src/arch/sparc/nativetrace.cc rename : src/cpu/nativetrace.hh => src/arch/sparc/nativetrace.hh rename : src/cpu/NativeTrace.py => src/arch/x86/X86NativeTrace.py
Diffstat (limited to 'src/cpu/nativetrace.hh')
-rw-r--r--src/cpu/nativetrace.hh155
1 files changed, 32 insertions, 123 deletions
diff --git a/src/cpu/nativetrace.hh b/src/cpu/nativetrace.hh
index f137e66ee..34869f263 100644
--- a/src/cpu/nativetrace.hh
+++ b/src/cpu/nativetrace.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2001-2005 The Regents of The University of Michigan
+ * Copyright (c) 2006-2009 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -25,15 +25,16 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * Authors: Steve Reinhardt
- * Nathan Binkert
+ * Authors: Gabe Black
*/
#ifndef __CPU_NATIVETRACE_HH__
#define __CPU_NATIVETRACE_HH__
-#include "arch/x86/floatregs.hh"
-#include "arch/x86/intregs.hh"
+#include <errno.h>
+#include <unistd.h>
+
+#include "base/socket.hh"
#include "base/trace.hh"
#include "base/types.hh"
#include "cpu/static_inst.hh"
@@ -71,102 +72,22 @@ class NativeTrace : public InstTracer
ListenSocket native_listener;
- bool checkRcx;
- bool checkR11;
- uint64_t oldRcxVal, oldR11Val;
- uint64_t oldRealRcxVal, oldRealR11Val;
-
- struct ThreadState {
- uint64_t rax;
- uint64_t rcx;
- uint64_t rdx;
- uint64_t rbx;
- uint64_t rsp;
- uint64_t rbp;
- uint64_t rsi;
- uint64_t rdi;
- uint64_t r8;
- uint64_t r9;
- uint64_t r10;
- uint64_t r11;
- uint64_t r12;
- uint64_t r13;
- uint64_t r14;
- uint64_t r15;
- uint64_t rip;
- //This should be expanded to 16 if x87 registers are considered
- uint64_t mmx[8];
- uint64_t xmm[32];
-
- void update(int fd)
- {
- int bytesLeft = sizeof(ThreadState);
- int bytesRead = 0;
- do
- {
- int res = read(fd, ((char *)this) + bytesRead, bytesLeft);
- if(res < 0)
- panic("Read call failed! %s\n", strerror(errno));
- bytesLeft -= res;
- bytesRead += res;
- } while(bytesLeft);
- rax = TheISA::gtoh(rax);
- rcx = TheISA::gtoh(rcx);
- rdx = TheISA::gtoh(rdx);
- rbx = TheISA::gtoh(rbx);
- rsp = TheISA::gtoh(rsp);
- rbp = TheISA::gtoh(rbp);
- rsi = TheISA::gtoh(rsi);
- rdi = TheISA::gtoh(rdi);
- r8 = TheISA::gtoh(r8);
- r9 = TheISA::gtoh(r9);
- r10 = TheISA::gtoh(r10);
- r11 = TheISA::gtoh(r11);
- r12 = TheISA::gtoh(r12);
- r13 = TheISA::gtoh(r13);
- r14 = TheISA::gtoh(r14);
- r15 = TheISA::gtoh(r15);
- rip = TheISA::gtoh(rip);
- //This should be expanded if x87 registers are considered
- for (int i = 0; i < 8; i++)
- mmx[i] = TheISA::gtoh(mmx[i]);
- for (int i = 0; i < 32; i++)
- xmm[i] = TheISA::gtoh(xmm[i]);
- }
-
- void update(ThreadContext * tc)
- {
- rax = tc->readIntReg(X86ISA::INTREG_RAX);
- rcx = tc->readIntReg(X86ISA::INTREG_RCX);
- rdx = tc->readIntReg(X86ISA::INTREG_RDX);
- rbx = tc->readIntReg(X86ISA::INTREG_RBX);
- rsp = tc->readIntReg(X86ISA::INTREG_RSP);
- rbp = tc->readIntReg(X86ISA::INTREG_RBP);
- rsi = tc->readIntReg(X86ISA::INTREG_RSI);
- rdi = tc->readIntReg(X86ISA::INTREG_RDI);
- r8 = tc->readIntReg(X86ISA::INTREG_R8);
- r9 = tc->readIntReg(X86ISA::INTREG_R9);
- r10 = tc->readIntReg(X86ISA::INTREG_R10);
- r11 = tc->readIntReg(X86ISA::INTREG_R11);
- r12 = tc->readIntReg(X86ISA::INTREG_R12);
- r13 = tc->readIntReg(X86ISA::INTREG_R13);
- r14 = tc->readIntReg(X86ISA::INTREG_R14);
- r15 = tc->readIntReg(X86ISA::INTREG_R15);
- rip = tc->readNextPC();
- //This should be expanded if x87 registers are considered
- for (int i = 0; i < 8; i++)
- mmx[i] = tc->readFloatRegBits(X86ISA::FLOATREG_MMX(i));
- for (int i = 0; i < 32; i++)
- xmm[i] = tc->readFloatRegBits(X86ISA::FLOATREG_XMM_BASE + i);
- }
-
- };
+ public:
- ThreadState nState;
- ThreadState mState;
+ NativeTrace(const Params *p);
+ virtual ~NativeTrace() {}
+ NativeTraceRecord *
+ getInstRecord(Tick when, ThreadContext *tc,
+ const StaticInstPtr staticInst, Addr pc,
+ const StaticInstPtr macroStaticInst = NULL, MicroPC upc = 0)
+ {
+ if (tc->misspeculating())
+ return NULL;
- public:
+ return new NativeTraceRecord(this, when, tc,
+ staticInst, pc, tc->misspeculating(), macroStaticInst, upc);
+ }
template<class T>
bool
@@ -181,35 +102,23 @@ class NativeTrace : public InstTracer
return true;
}
- bool
- checkRcxReg(const char * regName, uint64_t &, uint64_t &);
-
- bool
- checkR11Reg(const char * regName, uint64_t &, uint64_t &);
-
- bool
- checkXMM(int num, uint64_t mXmmBuf[], uint64_t nXmmBuf[]);
-
- NativeTrace(const Params *p);
-
- NativeTraceRecord *
- getInstRecord(Tick when, ThreadContext *tc,
- const StaticInstPtr staticInst, Addr pc,
- const StaticInstPtr macroStaticInst = NULL, MicroPC upc = 0)
+ void
+ read(void *ptr, size_t size)
{
- if (tc->misspeculating())
- return NULL;
-
- return new NativeTraceRecord(this, when, tc,
- staticInst, pc, tc->misspeculating(), macroStaticInst, upc);
+ size_t soFar = 0;
+ while (soFar < size) {
+ size_t res = ::read(fd, (uint8_t *)ptr + soFar, size - soFar);
+ if (res < 0)
+ panic("Read call failed! %s\n", strerror(errno));
+ else
+ soFar += res;
+ }
}
- void
- check(ThreadContext *, bool syscall);
-
- friend class NativeTraceRecord;
+ virtual void
+ check(NativeTraceRecord *record) = 0;
};
-/* namespace Trace */ }
+} /* namespace Trace */
#endif // __CPU_NATIVETRACE_HH__