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authorAndreas Sandberg <Andreas.Sandberg@ARM.com>2014-09-03 07:42:22 -0400
committerAndreas Sandberg <Andreas.Sandberg@ARM.com>2014-09-03 07:42:22 -0400
commit326662b01b0fbb7fe4e38cec7a96222d2891808b (patch)
tree35bbca1174a6262d3f69dcf729682e1183f8dede /src/cpu/nocpu
parente1ac9629398027186ef4c2a66772aeff2b4c6792 (diff)
downloadgem5-326662b01b0fbb7fe4e38cec7a96222d2891808b.tar.xz
arch, cpu: Factor out the ExecContext into a proper base class
We currently generate and compile one version of the ISA code per CPU model. This is obviously wasting a lot of resources at compile time. This changeset factors out the interface into a separate ExecContext class, which also serves as documentation for the interface between CPUs and the ISA code. While doing so, this changeset also fixes up interface inconsistencies between the different CPU models. The main argument for using one set of ISA code per CPU model has always been performance as this avoid indirect branches in the generated code. However, this argument does not hold water. Booting Linux on a simulated ARM system running in atomic mode (opt/10.linux-boot/realview-simple-atomic) is actually 2% faster (compiled using clang 3.4) after applying this patch. Additionally, compilation time is decreased by 35%.
Diffstat (limited to 'src/cpu/nocpu')
-rw-r--r--src/cpu/nocpu/SConsopts2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/nocpu/SConsopts b/src/cpu/nocpu/SConsopts
index 0baef0a82..40bf503ea 100644
--- a/src/cpu/nocpu/SConsopts
+++ b/src/cpu/nocpu/SConsopts
@@ -1,4 +1,4 @@
Import('*')
-CpuModel('no', '', '', { '': '' })
+CpuModel('no')