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authorAndreas Sandberg <andreas.sandberg@arm.com>2015-11-20 14:50:17 -0600
committerAndreas Sandberg <andreas.sandberg@arm.com>2015-11-20 14:50:17 -0600
commitd57a855e40e5d85024ce4a5dd31ad1e45897ee04 (patch)
tree8d7ce03cd66781f7b2b08993897b65bedecbe133 /src/cpu/o3/FUPool.py
parent90d430d5b3e0e322c07270bb168653eb4f5b2713 (diff)
downloadgem5-d57a855e40e5d85024ce4a5dd31ad1e45897ee04.tar.xz
cpu: Enforce 1 interrupt controller per thread
Consider it a fatal configuration error if the number of interrupt controllers doesn't match the number of threads in an SMT configuration.
Diffstat (limited to 'src/cpu/o3/FUPool.py')
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