diff options
author | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-09-03 07:42:35 -0400 |
---|---|---|
committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-09-03 07:42:35 -0400 |
commit | ecd53009712da59a98ad3c13ed20aaa8e8cd7e29 (patch) | |
tree | b23bf72ad68c2dce684d35ff1e6dda6c4a573150 /src/cpu/o3/O3CPU.py | |
parent | 1716749c8cec6f9c9f10a0aeaff981be759bb4e5 (diff) | |
download | gem5-ecd53009712da59a98ad3c13ed20aaa8e8cd7e29.tar.xz |
cpu: Add a fetch queue to the o3 cpu
This patch adds a fetch queue that sits between fetch and decode to the
o3 cpu. This effectively decouples fetch from decode stalls allowing it
to be more aggressive, running futher ahead in the instruction stream.
Diffstat (limited to 'src/cpu/o3/O3CPU.py')
-rw-r--r-- | src/cpu/o3/O3CPU.py | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/o3/O3CPU.py b/src/cpu/o3/O3CPU.py index fb5b5de2b..c70a12f1d 100644 --- a/src/cpu/o3/O3CPU.py +++ b/src/cpu/o3/O3CPU.py @@ -61,6 +61,7 @@ class DerivO3CPU(BaseCPU): commitToFetchDelay = Param.Cycles(1, "Commit to fetch delay") fetchWidth = Param.Unsigned(8, "Fetch width") fetchBufferSize = Param.Unsigned(64, "Fetch buffer size in bytes") + fetchQueueSize = Param.Unsigned(32, "Fetch queue size in micro-ops") renameToDecodeDelay = Param.Cycles(1, "Rename to decode delay") iewToDecodeDelay = Param.Cycles(1, "Issue/Execute/Writeback to decode " |