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authorMitch Hayenga <mitch.hayenga@arm.com>2014-09-03 07:42:34 -0400
committerMitch Hayenga <mitch.hayenga@arm.com>2014-09-03 07:42:34 -0400
commit1716749c8cec6f9c9f10a0aeaff981be759bb4e5 (patch)
tree0e789e02e642227ae170a18782daf05666f7316a /src/cpu/o3/O3CPU.py
parent976f27487b57e968a326752fcf74747427733df6 (diff)
downloadgem5-1716749c8cec6f9c9f10a0aeaff981be759bb4e5.tar.xz
cpu: Fix o3 front-end pipeline interlock behavior
The o3 pipeline interlock/stall logic is incorrect. o3 unnecessicarily stalled fetch and decode due to later stages in the pipeline. In general, a stage should usually only consider if it is stalled by the adjacent, downstream stage. Forcing stalls due to later stages creates and results in bubbles in the pipeline. Additionally, o3 stalled the entire frontend (fetch, decode, rename) on a branch mispredict while the ROB is being serially walked to update the RAT (robSquashing). Only should have stalled at rename.
Diffstat (limited to 'src/cpu/o3/O3CPU.py')
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