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authorAndrew Bardsley <Andrew.Bardsley@arm.com>2014-09-03 07:42:43 -0400
committerAndrew Bardsley <Andrew.Bardsley@arm.com>2014-09-03 07:42:43 -0400
commit035a82ee2c7e9ee72163a6559f721b242427906d (patch)
tree40092c2686468fc08214c3753c11cba2578922e3 /src/cpu/o3/O3CPU.py
parentee68c2b30232a43c5494ce183022e9fe09a004d2 (diff)
downloadgem5-035a82ee2c7e9ee72163a6559f721b242427906d.tar.xz
arm: ISA X31 destination register fix
This patch substituted the zero register for X31 used as a destination register. This prevents false dependencies based on X31.
Diffstat (limited to 'src/cpu/o3/O3CPU.py')
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