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authorNathan Binkert <binkertn@umich.edu>2007-06-20 08:14:11 -0700
committerNathan Binkert <binkertn@umich.edu>2007-06-20 08:14:11 -0700
commitb47737dde7e9138a7e7511380d785f11417552d0 (patch)
treef3de77e7b3ead10ccc01c23f4eadb9518ba6c909 /src/cpu/o3/O3CPU.py
parent438ec924d65f0ff36a88965b6db0b3d0c4c115b3 (diff)
downloadgem5-b47737dde7e9138a7e7511380d785f11417552d0.tar.xz
Make sure all parameters have default values if they're
supposed to and make sure parameters have the right type. Also make sure that any object that should be an intermediate type has the right options set. --HG-- extra : convert_revision : d56910628d9a067699827adbc0a26ab629d11e93
Diffstat (limited to 'src/cpu/o3/O3CPU.py')
-rw-r--r--src/cpu/o3/O3CPU.py20
1 files changed, 10 insertions, 10 deletions
diff --git a/src/cpu/o3/O3CPU.py b/src/cpu/o3/O3CPU.py
index e031faefa..e691cfe5d 100644
--- a/src/cpu/o3/O3CPU.py
+++ b/src/cpu/o3/O3CPU.py
@@ -55,7 +55,7 @@ class DerivO3CPU(BaseCPU):
checker.itb = Parent.itb
checker.dtb = Parent.dtb
- cachePorts = Param.Unsigned("Cache Ports")
+ cachePorts = Param.Unsigned(200, "Cache Ports")
icache_port = Port("Instruction Port")
dcache_port = Port("Data Port")
_mem_ports = ['icache_port', 'dcache_port']
@@ -137,15 +137,15 @@ class DerivO3CPU(BaseCPU):
function_trace = Param.Bool(False, "Enable function trace")
function_trace_start = Param.Tick(0, "Cycle to start function trace")
- smtNumFetchingThreads = Param.Unsigned("SMT Number of Fetching Threads")
- smtFetchPolicy = Param.String("SMT Fetch policy")
- smtLSQPolicy = Param.String("SMT LSQ Sharing Policy")
- smtLSQThreshold = Param.String("SMT LSQ Threshold Sharing Parameter")
- smtIQPolicy = Param.String("SMT IQ Sharing Policy")
- smtIQThreshold = Param.String("SMT IQ Threshold Sharing Parameter")
- smtROBPolicy = Param.String("SMT ROB Sharing Policy")
- smtROBThreshold = Param.String("SMT ROB Threshold Sharing Parameter")
- smtCommitPolicy = Param.String("SMT Commit Policy")
+ smtNumFetchingThreads = Param.Unsigned(1, "SMT Number of Fetching Threads")
+ smtFetchPolicy = Param.String('SingleThread', "SMT Fetch policy")
+ smtLSQPolicy = Param.String('Partitioned', "SMT LSQ Sharing Policy")
+ smtLSQThreshold = Param.Int(100, "SMT LSQ Threshold Sharing Parameter")
+ smtIQPolicy = Param.String('Partitioned', "SMT IQ Sharing Policy")
+ smtIQThreshold = Param.Int(100, "SMT IQ Threshold Sharing Parameter")
+ smtROBPolicy = Param.String('Partitioned', "SMT ROB Sharing Policy")
+ smtROBThreshold = Param.Int(100, "SMT ROB Threshold Sharing Parameter")
+ smtCommitPolicy = Param.String('RoundRobin', "SMT Commit Policy")
def addPrivateSplitL1Caches(self, ic, dc):
BaseCPU.addPrivateSplitL1Caches(self, ic, dc)