diff options
| author | Gabe Black <gblack@eecs.umich.edu> | 2007-03-07 20:04:45 +0000 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-03-07 20:04:45 +0000 |
| commit | 8edc9d79cee3edd6d16a8254a0180aaa242974c7 (patch) | |
| tree | 9ac7148f0862e81210fe929fcd61496ea7216727 /src/cpu/o3/alpha/cpu.hh | |
| parent | c82251326986affba0224460552236ebfe3447c2 (diff) | |
| parent | 49527ab55312bf02dfce20c45db8f173b0c2324e (diff) | |
| download | gem5-8edc9d79cee3edd6d16a8254a0180aaa242974c7.tar.xz | |
Merge zizzer.eecs.umich.edu:/bk/newmem
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem
--HG--
extra : convert_revision : d764fe37c71269a04fcede6cbf30e24262447e89
Diffstat (limited to 'src/cpu/o3/alpha/cpu.hh')
| -rw-r--r-- | src/cpu/o3/alpha/cpu.hh | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/o3/alpha/cpu.hh b/src/cpu/o3/alpha/cpu.hh index 4a2086296..676893098 100644 --- a/src/cpu/o3/alpha/cpu.hh +++ b/src/cpu/o3/alpha/cpu.hh @@ -106,21 +106,21 @@ class AlphaO3CPU : public FullO3CPU<Impl> #endif /** Reads a miscellaneous register. */ - TheISA::MiscReg readMiscReg(int misc_reg, unsigned tid); + TheISA::MiscReg readMiscRegNoEffect(int misc_reg, unsigned tid); /** Reads a misc. register, including any side effects the read * might have as defined by the architecture. */ - TheISA::MiscReg readMiscRegWithEffect(int misc_reg, unsigned tid); + TheISA::MiscReg readMiscReg(int misc_reg, unsigned tid); /** Sets a miscellaneous register. */ - void setMiscReg(int misc_reg, const TheISA::MiscReg &val, + void setMiscRegNoEffect(int misc_reg, const TheISA::MiscReg &val, unsigned tid); /** Sets a misc. register, including any side effects the write * might have as defined by the architecture. */ - void setMiscRegWithEffect(int misc_reg, const TheISA::MiscReg &val, + void setMiscReg(int misc_reg, const TheISA::MiscReg &val, unsigned tid); /** Initiates a squash of all in-flight instructions for a given |