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| author | Lisa Hsu <hsul@eecs.umich.edu> | 2006-11-01 19:25:09 -0500 |
|---|---|---|
| committer | Lisa Hsu <hsul@eecs.umich.edu> | 2006-11-01 19:25:09 -0500 |
| commit | 74ff45d353fadb8dd70f4fd9135ab66ce71e6718 (patch) | |
| tree | ca01663428d39566ff74022e08882c685b099020 /src/cpu/o3/alpha/cpu_impl.hh | |
| parent | 7665be4f7066dcc65cacc010ca740a01d57e08d5 (diff) | |
| download | gem5-74ff45d353fadb8dd70f4fd9135ab66ce71e6718.tar.xz | |
factor some more commone code and enable going from checkpoint into arbitrary CPU with or without caches.
configs/common/Simulation.py:
enable going from checkpoint into arbitrary CPU with or without caches.
--HG--
extra : convert_revision : 02e7ff8982fdb3a08bc609f89bd58df5b3a581b2
Diffstat (limited to 'src/cpu/o3/alpha/cpu_impl.hh')
0 files changed, 0 insertions, 0 deletions