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authorGabe Black <gblack@eecs.umich.edu>2006-11-03 02:25:39 -0500
committerGabe Black <gblack@eecs.umich.edu>2006-11-03 02:25:39 -0500
commitc8fc116c7636893517254f785707eba1726d3265 (patch)
tree7d3ed56234bf2f40d77395673b90ad7e69292165 /src/cpu/o3/alpha
parentfa918329000c3661a4c6840f952c3247522eb826 (diff)
downloadgem5-c8fc116c7636893517254f785707eba1726d3265.tar.xz
Add a new file which describes an ISA's interrupt handling mechanism. It records when interrupts are requested, and returns an interrupt to execute if the
--HG-- extra : convert_revision : c535000a6a170caefd441687b60f940513d29739
Diffstat (limited to 'src/cpu/o3/alpha')
-rw-r--r--src/cpu/o3/alpha/cpu_impl.hh48
1 files changed, 3 insertions, 45 deletions
diff --git a/src/cpu/o3/alpha/cpu_impl.hh b/src/cpu/o3/alpha/cpu_impl.hh
index f5c2170ce..170a53c23 100644
--- a/src/cpu/o3/alpha/cpu_impl.hh
+++ b/src/cpu/o3/alpha/cpu_impl.hh
@@ -270,7 +270,6 @@ template <class Impl>
void
AlphaO3CPU<Impl>::processInterrupts()
{
- using namespace TheISA;
// Check for interrupts here. For now can copy the code that
// exists within isa_fullsys_traits.hh. Also assume that thread 0
// is the one that handles the interrupts.
@@ -279,52 +278,11 @@ AlphaO3CPU<Impl>::processInterrupts()
// Check if there are any outstanding interrupts
//Handle the interrupts
- int ipl = 0;
- int summary = 0;
-
this->checkInterrupts = false;
+ Fault interrupt = this->interrupts.getInterrupt(this->tcBase(0));
- if (this->readMiscReg(IPR_ASTRR, 0))
- panic("asynchronous traps not implemented\n");
-
- if (this->readMiscReg(IPR_SIRR, 0)) {
- for (int i = INTLEVEL_SOFTWARE_MIN;
- i < INTLEVEL_SOFTWARE_MAX; i++) {
- if (this->readMiscReg(IPR_SIRR, 0) & (ULL(1) << i)) {
- // See table 4-19 of the 21164 hardware reference
- ipl = (i - INTLEVEL_SOFTWARE_MIN) + 1;
- summary |= (ULL(1) << i);
- }
- }
- }
-
- uint64_t interrupts = this->intr_status();
-
- if (interrupts) {
- for (int i = INTLEVEL_EXTERNAL_MIN;
- i < INTLEVEL_EXTERNAL_MAX; i++) {
- if (interrupts & (ULL(1) << i)) {
- // See table 4-19 of the 21164 hardware reference
- ipl = i;
- summary |= (ULL(1) << i);
- }
- }
- }
-
- if (ipl && ipl > this->readMiscReg(IPR_IPLR, 0)) {
- this->setMiscReg(IPR_ISR, summary, 0);
- this->setMiscReg(IPR_INTID, ipl, 0);
- // Checker needs to know these two registers were updated.
-#if USE_CHECKER
- if (this->checker) {
- this->checker->threadBase()->setMiscReg(IPR_ISR, summary);
- this->checker->threadBase()->setMiscReg(IPR_INTID, ipl);
- }
-#endif
- this->trap(Fault(new InterruptFault), 0);
- DPRINTF(Flow, "Interrupt! IPLR=%d ipl=%d summary=%x\n",
- this->readMiscReg(IPR_IPLR, 0), ipl, summary);
- }
+ if (interrupt != NoFault)
+ this->trap(interrupt, 0);
}
#endif // FULL_SYSTEM