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authorAli Saidi <saidi@eecs.umich.edu>2007-03-07 21:51:44 -0500
committerAli Saidi <saidi@eecs.umich.edu>2007-03-07 21:51:44 -0500
commit87fb0eb8de8bf66dfae5fc2d069cd17f420fc163 (patch)
treec7e3f1c653202f9d920eb740bb6dffa5ebd8df5e /src/cpu/o3/alpha
parent2f7a4e1d1b4ab44c5a1d97eaae6ff89fd100a0a9 (diff)
downloadgem5-87fb0eb8de8bf66dfae5fc2d069cd17f420fc163.tar.xz
I missed a couple of WithEffects, this should do it
--HG-- extra : convert_revision : 19fce78a19b27b7ccb5e3653a64b46e6d5292915
Diffstat (limited to 'src/cpu/o3/alpha')
-rw-r--r--src/cpu/o3/alpha/dyn_inst.hh8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/o3/alpha/dyn_inst.hh b/src/cpu/o3/alpha/dyn_inst.hh
index 6c27e890a..20759d849 100644
--- a/src/cpu/o3/alpha/dyn_inst.hh
+++ b/src/cpu/o3/alpha/dyn_inst.hh
@@ -125,7 +125,7 @@ class AlphaDynInst : public BaseDynInst<Impl>
}
/** Reads a miscellaneous register. */
- TheISA::MiscReg readMiscRegOperand(const StaticInst *si, int idx)
+ TheISA::MiscReg readMiscRegOperandNoEffect(const StaticInst *si, int idx)
{
return this->cpu->readMiscRegNoEffect(
si->srcRegIdx(idx) - TheISA::Ctrl_Base_DepTag,
@@ -135,7 +135,7 @@ class AlphaDynInst : public BaseDynInst<Impl>
/** Reads a misc. register, including any side-effects the read
* might have as defined by the architecture.
*/
- TheISA::MiscReg readMiscRegOperandWithEffect(const StaticInst *si, int idx)
+ TheISA::MiscReg readMiscRegOperand(const StaticInst *si, int idx)
{
return this->cpu->readMiscReg(
si->srcRegIdx(idx) - TheISA::Ctrl_Base_DepTag,
@@ -143,7 +143,7 @@ class AlphaDynInst : public BaseDynInst<Impl>
}
/** Sets a misc. register. */
- void setMiscRegOperand(const StaticInst * si, int idx, const MiscReg &val)
+ void setMiscRegOperandNoEffect(const StaticInst * si, int idx, const MiscReg &val)
{
this->instResult.integer = val;
return this->cpu->setMiscRegNoEffect(
@@ -154,7 +154,7 @@ class AlphaDynInst : public BaseDynInst<Impl>
/** Sets a misc. register, including any side-effects the write
* might have as defined by the architecture.
*/
- void setMiscRegOperandWithEffect(const StaticInst *si, int idx,
+ void setMiscRegOperand(const StaticInst *si, int idx,
const MiscReg &val)
{
return this->cpu->setMiscReg(