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authorKevin Lim <ktlim@umich.edu>2006-06-16 17:53:33 -0400
committerKevin Lim <ktlim@umich.edu>2006-06-16 17:53:33 -0400
commit4e07f6ca52828247fe1741b1e6c5269ad5291187 (patch)
treeaf786c3cfcdd5640b5840ffdfab64bb55b9e49f9 /src/cpu/o3/alpha_cpu_builder.cc
parent51a5b826373e2c08ba173854a19597d59e0e3c90 (diff)
parent0bbd909f02e72a321a65b933104c5ef1e157116b (diff)
downloadgem5-4e07f6ca52828247fe1741b1e6c5269ad5291187.tar.xz
Merge ktlim@zizzer:/bk/newmem
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-merge --HG-- extra : convert_revision : 488b9a9965dd86ca73dc9e510e5b3122cbd357f9
Diffstat (limited to 'src/cpu/o3/alpha_cpu_builder.cc')
-rw-r--r--src/cpu/o3/alpha_cpu_builder.cc22
1 files changed, 11 insertions, 11 deletions
diff --git a/src/cpu/o3/alpha_cpu_builder.cc b/src/cpu/o3/alpha_cpu_builder.cc
index a6fbe34d7..b1e141ff4 100644
--- a/src/cpu/o3/alpha_cpu_builder.cc
+++ b/src/cpu/o3/alpha_cpu_builder.cc
@@ -37,15 +37,15 @@
#include "cpu/o3/fu_pool.hh"
#include "sim/builder.hh"
-class DerivAlphaFullCPU : public AlphaFullCPU<AlphaSimpleImpl>
+class DerivAlphaO3CPU : public AlphaO3CPU<AlphaSimpleImpl>
{
public:
- DerivAlphaFullCPU(AlphaSimpleParams *p)
- : AlphaFullCPU<AlphaSimpleImpl>(p)
+ DerivAlphaO3CPU(AlphaSimpleParams *p)
+ : AlphaO3CPU<AlphaSimpleImpl>(p)
{ }
};
-BEGIN_DECLARE_SIM_OBJECT_PARAMS(DerivAlphaFullCPU)
+BEGIN_DECLARE_SIM_OBJECT_PARAMS(DerivAlphaO3CPU)
Param<int> clock;
Param<int> numThreads;
@@ -144,9 +144,9 @@ Param<bool> defer_registration;
Param<bool> function_trace;
Param<Tick> function_trace_start;
-END_DECLARE_SIM_OBJECT_PARAMS(DerivAlphaFullCPU)
+END_DECLARE_SIM_OBJECT_PARAMS(DerivAlphaO3CPU)
-BEGIN_INIT_SIM_OBJECT_PARAMS(DerivAlphaFullCPU)
+BEGIN_INIT_SIM_OBJECT_PARAMS(DerivAlphaO3CPU)
INIT_PARAM(clock, "clock speed"),
INIT_PARAM(numThreads, "number of HW thread contexts"),
@@ -261,11 +261,11 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(DerivAlphaFullCPU)
INIT_PARAM(function_trace, "Enable function trace"),
INIT_PARAM(function_trace_start, "Cycle to start function trace")
-END_INIT_SIM_OBJECT_PARAMS(DerivAlphaFullCPU)
+END_INIT_SIM_OBJECT_PARAMS(DerivAlphaO3CPU)
-CREATE_SIM_OBJECT(DerivAlphaFullCPU)
+CREATE_SIM_OBJECT(DerivAlphaO3CPU)
{
- DerivAlphaFullCPU *cpu;
+ DerivAlphaO3CPU *cpu;
#if FULL_SYSTEM
// Full-system only supports a single thread for the moment.
@@ -386,10 +386,10 @@ CREATE_SIM_OBJECT(DerivAlphaFullCPU)
params->functionTrace = function_trace;
params->functionTraceStart = function_trace_start;
- cpu = new DerivAlphaFullCPU(params);
+ cpu = new DerivAlphaO3CPU(params);
return cpu;
}
-REGISTER_SIM_OBJECT("DerivAlphaFullCPU", DerivAlphaFullCPU)
+REGISTER_SIM_OBJECT("DerivAlphaO3CPU", DerivAlphaO3CPU)