Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem

into  zizzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-o3

--HG--
extra : convert_revision : be1e5dcb1c5025db8526e628c2060b1790d38227

1 files changed, 2 insertions, 6 deletions

diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh
index 956b6ec3e..cb83012f7 100644
--- a/src/cpu/o3/commit.hh
+++ b/src/cpu/o3/commit.hh
@@ -286,13 +286,11 @@ class DefaultCommit
     /** Sets the next PC of a specific thread. */
     void setNextPC(uint64_t val, unsigned tid) { nextPC[tid] = val; }
 
-#if THE_ISA != ALPHA_ISA
     /** Reads the next NPC of a specific thread. */
-    uint64_t readNextPC(unsigned tid) { return nextNPC[tid]; }
+    uint64_t readNextNPC(unsigned tid) { return nextNPC[tid]; }
 
     /** Sets the next NPC of a specific thread. */
-    void setNextPC(uint64_t val, unsigned tid) { nextNPC[tid] = val; }
-#endif
+    void setNextNPC(uint64_t val, unsigned tid) { nextNPC[tid] = val; }
 
   private:
     /** Time buffer interface. */
@@ -397,10 +395,8 @@ class DefaultCommit
     /** The next PC of each thread. */
     Addr nextPC[Impl::MaxThreads];
 
-#if THE_ISA != ALPHA_ISA
     /** The next NPC of each thread. */
     Addr nextNPC[Impl::MaxThreads];
-#endif
 
     /** The sequence number of the youngest valid instruction in the ROB. */
     InstSeqNum youngestSeqNum[Impl::MaxThreads];