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author | Ali Saidi <saidi@eecs.umich.edu> | 2006-06-17 17:17:43 -0400 |
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committer | Ali Saidi <saidi@eecs.umich.edu> | 2006-06-17 17:17:43 -0400 |
commit | 8a1298822182c0ca01caddaa539bdb6a53927e57 (patch) | |
tree | 5677d2b7bf3a3d18295041167f1544def27f957c /src/cpu/o3/commit.hh | |
parent | b1fc43dd595e8f0420d9b61932c99f620df237a5 (diff) | |
parent | d96d28e56d39eec0baa1377779119495cfbf4701 (diff) | |
download | gem5-8a1298822182c0ca01caddaa539bdb6a53927e57.tar.xz |
Merge zizzer:/bk/newmem
into zeep.eecs.umich.edu:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : c8670f1a39d6826870ca0934587f4cc71c94b0ab
Diffstat (limited to 'src/cpu/o3/commit.hh')
-rw-r--r-- | src/cpu/o3/commit.hh | 22 |
1 files changed, 17 insertions, 5 deletions
diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh index 0b31cb9c8..860326283 100644 --- a/src/cpu/o3/commit.hh +++ b/src/cpu/o3/commit.hh @@ -26,6 +26,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Authors: Kevin Lim + * Korey Sewell */ #ifndef __CPU_O3_COMMIT_HH__ @@ -67,7 +68,7 @@ class DefaultCommit { public: // Typedefs from the Impl. - typedef typename Impl::FullCPU FullCPU; + typedef typename Impl::O3CPU O3CPU; typedef typename Impl::DynInstPtr DynInstPtr; typedef typename Impl::Params Params; typedef typename Impl::CPUPol CPUPol; @@ -145,7 +146,7 @@ class DefaultCommit void regStats(); /** Sets the CPU pointer. */ - void setCPU(FullCPU *cpu_ptr); + void setCPU(O3CPU *cpu_ptr); /** Sets the list of threads. */ void setThreads(std::vector<Thread *> &threads); @@ -280,12 +281,20 @@ class DefaultCommit /** Sets the PC of a specific thread. */ void setPC(uint64_t val, unsigned tid) { PC[tid] = val; } - /** Reads the PC of a specific thread. */ + /** Reads the next PC of a specific thread. */ uint64_t readNextPC(unsigned tid) { return nextPC[tid]; } /** Sets the next PC of a specific thread. */ void setNextPC(uint64_t val, unsigned tid) { nextPC[tid] = val; } +#if THE_ISA != ALPHA_ISA + /** Reads the next NPC of a specific thread. */ + uint64_t readNextPC(unsigned tid) { return nextNPC[tid]; } + + /** Sets the next NPC of a specific thread. */ + void setNextPC(uint64_t val, unsigned tid) { nextNPC[tid] = val; } +#endif + private: /** Time buffer interface. */ TimeBuffer<TimeStruct> *timeBuffer; @@ -317,8 +326,8 @@ class DefaultCommit ROB *rob; private: - /** Pointer to FullCPU. */ - FullCPU *cpu; + /** Pointer to O3CPU. */ + O3CPU *cpu; /** Vector of all of the threads. */ std::vector<Thread *> thread; @@ -397,6 +406,9 @@ class DefaultCommit /** The next PC of each thread. */ Addr nextPC[Impl::MaxThreads]; + /** The next NPC of each thread. */ + Addr nextNPC[Impl::MaxThreads]; + /** The sequence number of the youngest valid instruction in the ROB. */ InstSeqNum youngestSeqNum[Impl::MaxThreads]; |