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authorKevin Lim <ktlim@umich.edu>2007-03-23 13:20:19 -0400
committerKevin Lim <ktlim@umich.edu>2007-03-23 13:20:19 -0400
commit047f77102b5e5d63549663ee94cd799cdcf63516 (patch)
tree3c214a93043533716044b1c61c9d12aba3388c42 /src/cpu/o3/commit.hh
parent2c47413a7a4563c724d8470971d1059bdfe01c92 (diff)
parent2330adfa28ec39035beab8dae52873ecd0e28889 (diff)
downloadgem5-047f77102b5e5d63549663ee94cd799cdcf63516.tar.xz
Merge ktlim@zizzer:/bk/newmem
into zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/clean2 src/cpu/base_dyn_inst.hh: Hand merge. Line is no longer needed because it's handled in the ISA. --HG-- extra : convert_revision : 0be4067aa38759a5631c6940f0167d48fde2b680
Diffstat (limited to 'src/cpu/o3/commit.hh')
-rw-r--r--src/cpu/o3/commit.hh15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh
index 0d7d82529..e2ad23954 100644
--- a/src/cpu/o3/commit.hh
+++ b/src/cpu/o3/commit.hh
@@ -247,6 +247,11 @@ class DefaultCommit
/** Handles squashing due to an TC write. */
void squashFromTC(unsigned tid);
+#if FULL_SYSTEM
+ /** Handles processing an interrupt. */
+ void handleInterrupt();
+#endif // FULL_SYSTEM
+
/** Commits as many instructions as possible. */
void commitInsts();
@@ -409,6 +414,16 @@ class DefaultCommit
/** The sequence number of the youngest valid instruction in the ROB. */
InstSeqNum youngestSeqNum[Impl::MaxThreads];
+ /** Records if there is a trap currently in flight. */
+ bool trapInFlight[Impl::MaxThreads];
+
+ /** Records if there were any stores committed this cycle. */
+ bool committedStores[Impl::MaxThreads];
+
+ /** Records if commit should check if the ROB is truly empty (see
+ commit_impl.hh). */
+ bool checkEmptyROB[Impl::MaxThreads];
+
/** Pointer to the list of active threads. */
std::list<unsigned> *activeThreads;