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authorGabe Black <gblack@eecs.umich.edu>2007-06-21 20:35:25 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-06-21 20:35:25 +0000
commit49490b334af3bc145071a9a81f37012e7693af59 (patch)
tree7f07517e6d03bc004955f6a40a6c9dd3e02f7488 /src/cpu/o3/commit.hh
parent470a6a9a74eb28a5052e6492c0a3aa9724c57500 (diff)
parentafd00820004984de085a727e60e25742a69d9c51 (diff)
downloadgem5-49490b334af3bc145071a9a81f37012e7693af59.tar.xz
Merge zizzer.eecs.umich.edu:/bk/newmem
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro src/cpu/o3/fetch_impl.hh: hand merge --HG-- extra : convert_revision : 3f71f3ac2035eec8b6f7bceb6906edb4dd09c045
Diffstat (limited to 'src/cpu/o3/commit.hh')
-rw-r--r--src/cpu/o3/commit.hh34
1 files changed, 27 insertions, 7 deletions
diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh
index fba618c14..27bdd20c5 100644
--- a/src/cpu/o3/commit.hh
+++ b/src/cpu/o3/commit.hh
@@ -279,25 +279,37 @@ class DefaultCommit
/** Returns the PC of the head instruction of the ROB.
* @todo: Probably remove this function as it returns only thread 0.
*/
- uint64_t readPC() { return PC[0]; }
+ Addr readPC() { return PC[0]; }
/** Returns the PC of a specific thread. */
- uint64_t readPC(unsigned tid) { return PC[tid]; }
+ Addr readPC(unsigned tid) { return PC[tid]; }
/** Sets the PC of a specific thread. */
- void setPC(uint64_t val, unsigned tid) { PC[tid] = val; }
+ void setPC(Addr val, unsigned tid) { PC[tid] = val; }
+
+ /** Reads the micro PC of a specific thread. */
+ Addr readMicroPC(unsigned tid) { return microPC[tid]; }
+
+ /** Sets the micro PC of a specific thread */
+ void setMicroPC(Addr val, unsigned tid) { microPC[tid] = val; }
/** Reads the next PC of a specific thread. */
- uint64_t readNextPC(unsigned tid) { return nextPC[tid]; }
+ Addr readNextPC(unsigned tid) { return nextPC[tid]; }
/** Sets the next PC of a specific thread. */
- void setNextPC(uint64_t val, unsigned tid) { nextPC[tid] = val; }
+ void setNextPC(Addr val, unsigned tid) { nextPC[tid] = val; }
/** Reads the next NPC of a specific thread. */
- uint64_t readNextNPC(unsigned tid) { return nextNPC[tid]; }
+ Addr readNextNPC(unsigned tid) { return nextNPC[tid]; }
/** Sets the next NPC of a specific thread. */
- void setNextNPC(uint64_t val, unsigned tid) { nextNPC[tid] = val; }
+ void setNextNPC(Addr val, unsigned tid) { nextNPC[tid] = val; }
+
+ /** Reads the micro PC of a specific thread. */
+ Addr readNextMicroPC(unsigned tid) { return nextMicroPC[tid]; }
+
+ /** Sets the micro PC of a specific thread */
+ void setNextMicroPC(Addr val, unsigned tid) { nextMicroPC[tid] = val; }
private:
/** Time buffer interface. */
@@ -402,12 +414,20 @@ class DefaultCommit
*/
Addr PC[Impl::MaxThreads];
+ /** The commit micro PC of each thread. Refers to the instruction that
+ * is currently being processed/committed.
+ */
+ Addr microPC[Impl::MaxThreads];
+
/** The next PC of each thread. */
Addr nextPC[Impl::MaxThreads];
/** The next NPC of each thread. */
Addr nextNPC[Impl::MaxThreads];
+ /** The next micro PC of each thread. */
+ Addr nextMicroPC[Impl::MaxThreads];
+
/** The sequence number of the youngest valid instruction in the ROB. */
InstSeqNum youngestSeqNum[Impl::MaxThreads];