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authorGeoffrey Blake <geoffrey.blake@arm.com>2012-01-31 07:46:03 -0800
committerGeoffrey Blake <geoffrey.blake@arm.com>2012-01-31 07:46:03 -0800
commitaf6aaf258171027af8d3cf0ef86dddff501a3ccb (patch)
tree3473845b7217b48dcf43460f0a90ca655a7018ed /src/cpu/o3/commit_impl.hh
parentade53def9252a36a39b2c4bd61196355906f0505 (diff)
downloadgem5-af6aaf258171027af8d3cf0ef86dddff501a3ccb.tar.xz
CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5
Brings the CheckerCPU back to life to allow FS and SE checking of the O3CPU. These changes have only been tested with the ARM ISA. Other ISAs potentially require modification.
Diffstat (limited to 'src/cpu/o3/commit_impl.hh')
-rw-r--r--src/cpu/o3/commit_impl.hh12
1 files changed, 10 insertions, 2 deletions
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 9ff31a622..cb2f9a634 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -728,6 +728,12 @@ DefaultCommit<Impl>::handleInterrupt()
assert(!thread[0]->inSyscall);
thread[0]->inSyscall = true;
+#if USE_CHECKER
+ if (cpu->checker) {
+ cpu->checker->handlePendingInt();
+ }
+#endif
+
// CPU will handle interrupt.
cpu->processInterrupts(interrupt);
@@ -775,7 +781,8 @@ DefaultCommit<Impl>::commit()
{
#if FULL_SYSTEM
- // Check for any interrupt that we've already squashed for and start processing it.
+ // Check for any interrupt that we've already squashed for and
+ // start processing it.
if (interrupt != NoFault)
handleInterrupt();
@@ -1133,7 +1140,8 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num)
head_inst->setCompleted();
#if USE_CHECKER
- if (cpu->checker && head_inst->isStore()) {
+ if (cpu->checker) {
+ // Need to check the instruction before its fault is processed
cpu->checker->verify(head_inst);
}
#endif