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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2012-02-10 08:37:28 -0600 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2012-02-10 08:37:28 -0600 |
| commit | 8f7e03d4cf4810fa3e09b134c2cf5b6df78a39b0 (patch) | |
| tree | 40f6b9425dd1b0d2c2f622abc1a8c254ab0cec01 /src/cpu/o3/commit_impl.hh | |
| parent | 0e597e944ae0cf368df06235e832bc441cb4e022 (diff) | |
| download | gem5-8f7e03d4cf4810fa3e09b134c2cf5b6df78a39b0.tar.xz | |
O3 CPU: Provide the squashing instruction
This patch adds a function to the ROB that will get the squashing instruction
from the ROB's list of instructions. This squashing instruction is used for
figuring out the macroop from which the fetch stage should fetch the microops.
Further, a check has been added that if the instructions are to be fetched
from the cache maintained by the fetch stage, then the data in the cache should
be valid and the PC of the thread being fetched from is same as the address of
the cache block.
Diffstat (limited to 'src/cpu/o3/commit_impl.hh')
| -rw-r--r-- | src/cpu/o3/commit_impl.hh | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh index edf7e861b..a9b795933 100644 --- a/src/cpu/o3/commit_impl.hh +++ b/src/cpu/o3/commit_impl.hh @@ -856,7 +856,8 @@ DefaultCommit<Impl>::commit() fromIEW->mispredictInst[tid]; toIEW->commitInfo[tid].branchTaken = fromIEW->branchTaken[tid]; - toIEW->commitInfo[tid].squashInst = NULL; + toIEW->commitInfo[tid].squashInst = + rob->findInst(tid, squashed_inst); toIEW->commitInfo[tid].pc = fromIEW->pc[tid]; |