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authorGabe Black <gblack@eecs.umich.edu>2006-12-06 06:05:28 -0500
committerGabe Black <gblack@eecs.umich.edu>2006-12-06 06:05:28 -0500
commit2dcf00bc8b6ca0bdfc8ab9a105f7a7780c763bb4 (patch)
treec34b7e7417d0c95255def0cea2a48a72229da344 /src/cpu/o3/cpu.cc
parentbe29adf51cb115e7e55321bd58b7f6593e6d0080 (diff)
parent54a946604b2fa81c0d58fc41bfe1d82840f44793 (diff)
downloadgem5-2dcf00bc8b6ca0bdfc8ab9a105f7a7780c763bb4.tar.xz
Merge zizzer:/bk/newmem
into zower.eecs.umich.edu:/eecshome/m5/newmem src/cpu/o3/commit_impl.hh: Hand Merge --HG-- extra : convert_revision : 6984db90d5b5ec71c31f1c345f5a77eed540059e
Diffstat (limited to 'src/cpu/o3/cpu.cc')
-rw-r--r--src/cpu/o3/cpu.cc8
1 files changed, 6 insertions, 2 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 3dc353a9f..a5a00015f 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -497,8 +497,6 @@ FullO3CPU<Impl>::init()
}
#if FULL_SYSTEM
- src_tc->init();
-
TheISA::initCPU(src_tc, src_tc->readCpuId());
#endif
}
@@ -554,6 +552,12 @@ template <class Impl>
void
FullO3CPU<Impl>::activateContext(int tid, int delay)
{
+#if FULL_SYSTEM
+ // Connect the ThreadContext's memory ports (Functional/Virtual
+ // Ports)
+ threadContexts[tid]->connectMemPorts();
+#endif
+
// Needs to set each stage to running as well.
if (delay){
DPRINTF(O3CPU, "[tid:%i]: Scheduling thread context to activate "