diff options
| author | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-09-03 07:42:37 -0400 |
|---|---|---|
| committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-09-03 07:42:37 -0400 |
| commit | 4f26bedc1883da58d1dceba2bbc555417b7a0cca (patch) | |
| tree | 1f283ab152999760dddc5ac02035c2e54a76dd21 /src/cpu/o3/cpu.cc | |
| parent | daedc5a49127eb91036291af1619bbc98016aff0 (diff) | |
| download | gem5-4f26bedc1883da58d1dceba2bbc555417b7a0cca.tar.xz | |
cpu: Fix SMT scheduling issue with the O3 cpu
The o3 cpu could attempt to schedule inactive threads under round-robin SMT
mode.
This is because it maintained an independent priority list of threads from the
active thread list. This priority list could be come stale once threads were
inactive, leading to the cpu trying to fetch/commit from inactive threads.
Additionally the fetch queue is now forcibly flushed of instrctuctions
from the de-scheduled thread.
Relevant output:
24557000: system.cpu: [tid:1]: Calling deactivate thread.
24557000: system.cpu: [tid:1]: Removing from active threads list
24557500: system.cpu:
FullO3CPU: Ticking main, FullO3CPU.
24557500: system.cpu.fetch: Running stage.
24557500: system.cpu.fetch: Attempting to fetch from [tid:1]
Diffstat (limited to 'src/cpu/o3/cpu.cc')
| -rw-r--r-- | src/cpu/o3/cpu.cc | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index 4f48e29d9..2055d63b6 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011-2012 ARM Limited + * Copyright (c) 2011-2012, 2014 ARM Limited * Copyright (c) 2013 Advanced Micro Devices, Inc. * All rights reserved * @@ -728,6 +728,9 @@ FullO3CPU<Impl>::deactivateThread(ThreadID tid) tid); activeThreads.erase(thread_it); } + + fetch.deactivateThread(tid); + commit.deactivateThread(tid); } template <class Impl> |