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| author | Gabe Black <gblack@eecs.umich.edu> | 2006-11-29 17:34:20 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2006-11-29 17:34:20 -0500 |
| commit | 5bdf4400b223056d296ae27f4a7ee2f707a4d1bd (patch) | |
| tree | ff29e4424fe411d28b82ab653baa86a7f86ed18b /src/cpu/o3/cpu.cc | |
| parent | f2daf210f1cac2dd0a102b9d796fb700d4be92d1 (diff) | |
| parent | 544f4b4d8156c1b7f779a2dd974cbff6a5b67c20 (diff) | |
| download | gem5-5bdf4400b223056d296ae27f4a7ee2f707a4d1bd.tar.xz | |
Merge zizzer:/bk/sparcfs
into zower.eecs.umich.edu:/eecshome/m5/newmemmid
src/arch/sparc/isa_traits.hh:
src/arch/sparc/miscregfile.hh:
hand merge
--HG--
extra : convert_revision : 34f50dc5e6e22096cb2c08b5888f2b0fcd418f3e
Diffstat (limited to 'src/cpu/o3/cpu.cc')
| -rw-r--r-- | src/cpu/o3/cpu.cc | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index 3dc353a9f..a5a00015f 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -497,8 +497,6 @@ FullO3CPU<Impl>::init() } #if FULL_SYSTEM - src_tc->init(); - TheISA::initCPU(src_tc, src_tc->readCpuId()); #endif } @@ -554,6 +552,12 @@ template <class Impl> void FullO3CPU<Impl>::activateContext(int tid, int delay) { +#if FULL_SYSTEM + // Connect the ThreadContext's memory ports (Functional/Virtual + // Ports) + threadContexts[tid]->connectMemPorts(); +#endif + // Needs to set each stage to running as well. if (delay){ DPRINTF(O3CPU, "[tid:%i]: Scheduling thread context to activate " |