summaryrefslogtreecommitdiff
path: root/src/cpu/o3/cpu.cc
diff options
context:
space:
mode:
authorNilay Vaish <nilay@cs.wisc.edu>2013-01-12 22:09:48 -0600
committerNilay Vaish <nilay@cs.wisc.edu>2013-01-12 22:09:48 -0600
commit25ec278a0be5e3e09d396ef5be993e45b766790b (patch)
tree1e053058f01fd0414c87b989f12c497fe6024f0a /src/cpu/o3/cpu.cc
parentfe3fbe624e9524ba5fdc55586e40eaa700c81c78 (diff)
downloadgem5-25ec278a0be5e3e09d396ef5be993e45b766790b.tar.xz
x86: Changes to decoder, corrects 9376
The changes made by the changeset 9376 were not quite correct. The patch made changes to the code which resulted in decoder not getting initialized correctly when the state was restored from a checkpoint. This patch adds a startup function to each ISA object. For x86, this function sets the required state in the decoder. For other ISAs, the function is empty right now.
Diffstat (limited to 'src/cpu/o3/cpu.cc')
-rw-r--r--src/cpu/o3/cpu.cc3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 18c536090..393b9a189 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -678,6 +678,9 @@ template <class Impl>
void
FullO3CPU<Impl>::startup()
{
+ for (int tid = 0; tid < numThreads; ++tid)
+ isa[tid]->startup(threadContexts[tid]);
+
fetch.startupStage();
decode.startupStage();
iew.startupStage();