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| author | Iru Cai <mytbk920423@gmail.com> | 2019-02-28 17:07:16 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2019-03-18 15:46:57 +0800 |
| commit | 970e6b3f8313c5ffc10b5cd84d2d471746b15999 (patch) | |
| tree | aa3b4a369675d9c4fb019db3a0882652204cf63b /src/cpu/o3/cpu.cc | |
| parent | 497ebfe98578b71d22f979b848c4b873f05ec6ee (diff) | |
| download | gem5-970e6b3f8313c5ffc10b5cd84d2d471746b15999.tar.xz | |
invisispec-1.0 source
Diffstat (limited to 'src/cpu/o3/cpu.cc')
| -rw-r--r-- | src/cpu/o3/cpu.cc | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index c4bc13fb4..27ad78e2e 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -593,6 +593,7 @@ FullO3CPU<Impl>::tick() activityRec.advance(); + DPRINTF(O3CPU, "activityRec.advance() complete\n"); if (removeInstsThisCycle) { cleanUpRemovedInsts(); } @@ -610,6 +611,8 @@ FullO3CPU<Impl>::tick() schedule(tickEvent, clockEdge(Cycles(1))); DPRINTF(O3CPU, "Scheduling next tick!\n"); } + } else { + DPRINTF(O3CPU, "tickEvent.scheduled == false, %lu", curTick()); } if (!FullSystem) |