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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:02:20 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:02:20 -0700 |
| commit | 25884a87733cd35ef6613aaef9a8a08194267552 (patch) | |
| tree | 3eb831102c76206ba5ba4e19b94810be67ce108f /src/cpu/o3/cpu.cc | |
| parent | 32daf6fc3fd34af0023ae74c2a1f8dd597f87242 (diff) | |
| download | gem5-25884a87733cd35ef6613aaef9a8a08194267552.tar.xz | |
Registers: Get rid of the float register width parameter.
Diffstat (limited to 'src/cpu/o3/cpu.cc')
| -rw-r--r-- | src/cpu/o3/cpu.cc | 52 |
1 files changed, 2 insertions, 50 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index 2f8869b6f..394efe16a 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -1215,13 +1215,6 @@ FullO3CPU<Impl>::readIntReg(int reg_idx) template <class Impl> FloatReg -FullO3CPU<Impl>::readFloatReg(int reg_idx, int width) -{ - return regFile.readFloatReg(reg_idx, width); -} - -template <class Impl> -FloatReg FullO3CPU<Impl>::readFloatReg(int reg_idx) { return regFile.readFloatReg(reg_idx); @@ -1229,13 +1222,6 @@ FullO3CPU<Impl>::readFloatReg(int reg_idx) template <class Impl> FloatRegBits -FullO3CPU<Impl>::readFloatRegBits(int reg_idx, int width) -{ - return regFile.readFloatRegBits(reg_idx, width); -} - -template <class Impl> -FloatRegBits FullO3CPU<Impl>::readFloatRegBits(int reg_idx) { return regFile.readFloatRegBits(reg_idx); @@ -1250,13 +1236,6 @@ FullO3CPU<Impl>::setIntReg(int reg_idx, uint64_t val) template <class Impl> void -FullO3CPU<Impl>::setFloatReg(int reg_idx, FloatReg val, int width) -{ - regFile.setFloatReg(reg_idx, val, width); -} - -template <class Impl> -void FullO3CPU<Impl>::setFloatReg(int reg_idx, FloatReg val) { regFile.setFloatReg(reg_idx, val); @@ -1264,13 +1243,6 @@ FullO3CPU<Impl>::setFloatReg(int reg_idx, FloatReg val) template <class Impl> void -FullO3CPU<Impl>::setFloatRegBits(int reg_idx, FloatRegBits val, int width) -{ - regFile.setFloatRegBits(reg_idx, val, width); -} - -template <class Impl> -void FullO3CPU<Impl>::setFloatRegBits(int reg_idx, FloatRegBits val) { regFile.setFloatRegBits(reg_idx, val); @@ -1287,7 +1259,7 @@ FullO3CPU<Impl>::readArchIntReg(int reg_idx, ThreadID tid) template <class Impl> float -FullO3CPU<Impl>::readArchFloatRegSingle(int reg_idx, ThreadID tid) +FullO3CPU<Impl>::readArchFloatReg(int reg_idx, ThreadID tid) { int idx = reg_idx + TheISA::NumIntRegs; PhysRegIndex phys_reg = commitRenameMap[tid].lookup(idx); @@ -1296,16 +1268,6 @@ FullO3CPU<Impl>::readArchFloatRegSingle(int reg_idx, ThreadID tid) } template <class Impl> -double -FullO3CPU<Impl>::readArchFloatRegDouble(int reg_idx, ThreadID tid) -{ - int idx = reg_idx + TheISA::NumIntRegs; - PhysRegIndex phys_reg = commitRenameMap[tid].lookup(idx); - - return regFile.readFloatReg(phys_reg, 64); -} - -template <class Impl> uint64_t FullO3CPU<Impl>::readArchFloatRegInt(int reg_idx, ThreadID tid) { @@ -1326,7 +1288,7 @@ FullO3CPU<Impl>::setArchIntReg(int reg_idx, uint64_t val, ThreadID tid) template <class Impl> void -FullO3CPU<Impl>::setArchFloatRegSingle(int reg_idx, float val, ThreadID tid) +FullO3CPU<Impl>::setArchFloatReg(int reg_idx, float val, ThreadID tid) { int idx = reg_idx + TheISA::NumIntRegs; PhysRegIndex phys_reg = commitRenameMap[tid].lookup(idx); @@ -1336,16 +1298,6 @@ FullO3CPU<Impl>::setArchFloatRegSingle(int reg_idx, float val, ThreadID tid) template <class Impl> void -FullO3CPU<Impl>::setArchFloatRegDouble(int reg_idx, double val, ThreadID tid) -{ - int idx = reg_idx + TheISA::NumIntRegs; - PhysRegIndex phys_reg = commitRenameMap[tid].lookup(idx); - - regFile.setFloatReg(phys_reg, val, 64); -} - -template <class Impl> -void FullO3CPU<Impl>::setArchFloatRegInt(int reg_idx, uint64_t val, ThreadID tid) { int idx = reg_idx + TheISA::NumIntRegs; |