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authorMitch Hayenga <mitch.hayenga@arm.com>2015-09-30 11:14:19 -0500
committerMitch Hayenga <mitch.hayenga@arm.com>2015-09-30 11:14:19 -0500
commitfafa83ed32933fe250d34dfca23fba348429b176 (patch)
tree3bf8fd636f1e879273045fefda3b5d7319a38479 /src/cpu/o3/cpu.cc
parent582a0148b441fe9f4a6f977094c5ce6bf7ab6313 (diff)
downloadgem5-fafa83ed32933fe250d34dfca23fba348429b176.tar.xz
cpu: Add per-thread monitors
Adds per-thread address monitors to support FullSystem SMT.
Diffstat (limited to 'src/cpu/o3/cpu.cc')
-rw-r--r--src/cpu/o3/cpu.cc7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 026907a94..4ab004817 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -118,9 +118,10 @@ template <class Impl>
void
FullO3CPU<Impl>::DcachePort::recvTimingSnoopReq(PacketPtr pkt)
{
- // X86 ISA: Snooping an invalidation for monitor/mwait
- if(cpu->getCpuAddrMonitor()->doMonitor(pkt)) {
- cpu->wakeup();
+ for (ThreadID tid = 0; tid < cpu->numThreads; tid++) {
+ if (cpu->getCpuAddrMonitor(tid)->doMonitor(pkt)) {
+ cpu->wakeup();
+ }
}
lsq->recvTimingSnoopReq(pkt);
}