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| author | Korey Sewell <ksewell@umich.edu> | 2008-02-27 17:50:29 -0500 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2008-02-27 17:50:29 -0500 |
| commit | 8fb74c238cbf7a394d5d547dea987e35eddfca79 (patch) | |
| tree | fc5c67f02bc8c67956b0dcb57c26425ca0c8e6b9 /src/cpu/o3/cpu.cc | |
| parent | b45cf21a8e2ead22996daa0960747db8ec95db71 (diff) | |
| download | gem5-8fb74c238cbf7a394d5d547dea987e35eddfca79.tar.xz | |
Add comments in code to describe bug conditions.
This should help if somebody gets to the bug
fix before me (or someone else)...
--HG--
extra : convert_revision : 0ae64c58ef4f7b02996f31e9e9e6bfad344719e2
Diffstat (limited to 'src/cpu/o3/cpu.cc')
| -rw-r--r-- | src/cpu/o3/cpu.cc | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index 84aea0479..c75a08213 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -671,7 +671,12 @@ FullO3CPU<Impl>::removeThread(unsigned tid) // Copy Thread Data From RegFile // If thread is suspended, it might be re-allocated - //this->copyToTC(tid); + // this->copyToTC(tid); + + + // @todo: 2-27-2008: Fix how we free up rename mappings + // here to alleviate the case for double-freeing registers + // in SMT workloads. // Unbind Int Regs from Rename Map for (int ireg = 0; ireg < TheISA::NumIntRegs; ireg++) { |