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| author | Iru Cai <mytbk920423@gmail.com> | 2019-04-02 16:28:08 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2019-04-02 16:28:08 +0800 |
| commit | b28522528109f87d9420e59a31cef88a045ed0e6 (patch) | |
| tree | 34eabdfbdc99f12416aba91b13fd4ae808afc276 /src/cpu/o3/cpu.hh | |
| parent | 05098cf70b668b9eac91db71c5bd44765ee1e6d5 (diff) | |
| download | gem5-b28522528109f87d9420e59a31cef88a045ed0e6.tar.xz | |
methods to set taint
Diffstat (limited to 'src/cpu/o3/cpu.hh')
| -rw-r--r-- | src/cpu/o3/cpu.hh | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh index 19b9a34e0..23e6f7434 100644 --- a/src/cpu/o3/cpu.hh +++ b/src/cpu/o3/cpu.hh @@ -399,6 +399,9 @@ class FullO3CPU : public BaseO3CPU void setMiscReg(int misc_reg, const TheISA::MiscReg &val, ThreadID tid); + /** taint a register */ + void setTaint(PhysRegIdPtr phys_reg); + uint64_t readIntReg(PhysRegIdPtr phys_reg); TheISA::FloatReg readFloatReg(PhysRegIdPtr phys_reg); |