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authorAndreas Hansson <andreas.hansson@arm.com>2016-02-10 04:08:24 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2016-02-10 04:08:24 -0500
commitfbdeb6031664d71e19a25f51b6ee882d803dac30 (patch)
tree0a3fa9a980e9b9a1013b3aff37080b045192b650 /src/cpu/o3/cpu.hh
parentbead7f249a71f8b15ae92b0df9822abb52ca7323 (diff)
downloadgem5-fbdeb6031664d71e19a25f51b6ee882d803dac30.tar.xz
mem: Deduce if cache should forward snoops
This patch changes how the cache determines if snoops should be forwarded from the memory side to the CPU side. Instead of having a parameter, the cache now looks at the port connected on the CPU side, and if it is a snooping port, then snoops are forwarded. Less error prone, and less parameters to worry about. The patch also tidies up the CPU classes to ensure that their I-side port is not snooping by removing overrides to the snoop request handler, such that snoop requests will panic via the default MasterPort implement
Diffstat (limited to 'src/cpu/o3/cpu.hh')
-rw-r--r--src/cpu/o3/cpu.hh1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index eed5811cb..2065202f7 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -147,7 +147,6 @@ class FullO3CPU : public BaseO3CPU
/** Timing version of receive. Handles setting fetch to the
* proper status to start fetching. */
virtual bool recvTimingResp(PacketPtr pkt);
- virtual void recvTimingSnoopReq(PacketPtr pkt) { }
/** Handles doing a retry of a failed fetch. */
virtual void recvReqRetry();