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author | Korey Sewell <ksewell@umich.edu> | 2006-08-31 20:51:30 -0400 |
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committer | Korey Sewell <ksewell@umich.edu> | 2006-08-31 20:51:30 -0400 |
commit | 82862e0e15fbb55e022823d5ea5cc8470e330c22 (patch) | |
tree | b1c2184d5fe9d5b38cf494365d368c11a99acdd1 /src/cpu/o3/cpu.hh | |
parent | a8a7ce2b886ca2571f9470a48a4f12302f9cc830 (diff) | |
download | gem5-82862e0e15fbb55e022823d5ea5cc8470e330c22.tar.xz |
add ISA_HAS_DELAY_SLOT directive instead of "#if THE_ISA == ALPHA_ISA" throughout CPU models
src/arch/alpha/isa_traits.hh:
src/arch/mips/isa_traits.hh:
src/arch/sparc/isa_traits.hh:
define 'ISA_HAS_DELAY_SLOT'
src/cpu/base_dyn_inst.hh:
src/cpu/o3/bpred_unit_impl.hh:
src/cpu/o3/commit_impl.hh:
src/cpu/o3/cpu.cc:
src/cpu/o3/cpu.hh:
src/cpu/o3/decode_impl.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/o3/iew_impl.hh:
src/cpu/o3/inst_queue_impl.hh:
src/cpu/o3/rename_impl.hh:
src/cpu/simple/base.cc:
use ISA_HAS_DELAY_SLOT instead of THE_ISA == ALPHA_ISA
--HG--
extra : convert_revision : 24c7460d9391e8d443c9fe08e17c331ae8e9c36a
Diffstat (limited to 'src/cpu/o3/cpu.hh')
-rw-r--r-- | src/cpu/o3/cpu.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh index 7e18571f1..dcdcd1fe6 100644 --- a/src/cpu/o3/cpu.hh +++ b/src/cpu/o3/cpu.hh @@ -598,7 +598,7 @@ class FullO3CPU : public BaseO3CPU } /** The global sequence number counter. */ - InstSeqNum globalSeqNum; + InstSeqNum globalSeqNum;//[Impl::MaxThreads]; /** Pointer to the checker, which can dynamically verify * instruction results at run time. This can be set to NULL if it |