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authorAndreas Hansson <andreas.hansson@arm.com>2012-04-14 05:45:07 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2012-04-14 05:45:07 -0400
commitdccca0d3a9c985972d3d603190e62899d03825e8 (patch)
treef186c5b7c6656397f04660ec2e43a2cb1a6c11f6 /src/cpu/o3/cpu.hh
parentb9bc530ad20bceeed6e43ea459d271046f43e70c (diff)
downloadgem5-dccca0d3a9c985972d3d603190e62899d03825e8.tar.xz
MEM: Separate snoops and normal memory requests/responses
This patch introduces port access methods that separates snoop request/responses from normal memory request/responses. The differentiation is made for functional, atomic and timing accesses and builds on the introduction of master and slave ports. Before the introduction of this patch, the packets belonging to the different phases of the protocol (request -> [forwarded snoop request -> snoop response]* -> response) all use the same port access functions, even though the snoop packets flow in the opposite direction to the normal packet. That is, a coherent master sends normal request and receives responses, but receives snoop requests and sends snoop responses (vice versa for the slave). These two distinct phases now use different access functions, as described below. Starting with the functional access, a master sends a request to a slave through sendFunctional, and the request packet is turned into a response before the call returns. In a system without cache coherence, this is all that is needed from the functional interface. For the cache-coherent scenario, a slave also sends snoop requests to coherent masters through sendFunctionalSnoop, with responses returned within the same packet pointer. This is currently used by the bus and caches, and the LSQ of the O3 CPU. The send/recvFunctional and send/recvFunctionalSnoop are moved from the Port super class to the appropriate subclass. Atomic accesses follow the same flow as functional accesses, with request being sent from master to slave through sendAtomic. In the case of cache-coherent ports, a slave can send snoop requests to a master through sendAtomicSnoop. Just as for the functional access methods, the atomic send and receive member functions are moved to the appropriate subclasses. The timing access methods are different from the functional and atomic in that requests and responses are separated in time and send/recvTiming are used for both directions. Hence, a master uses sendTiming to send a request to a slave, and a slave uses sendTiming to send a response back to a master, at a later point in time. Snoop requests and responses travel in the opposite direction, similar to what happens in functional and atomic accesses. With the introduction of this patch, it is possible to determine the direction of packets in the bus, and no longer necessary to look for both a master and a slave port with the requested port id. In contrast to the normal recvFunctional, recvAtomic and recvTiming that are pure virtual functions, the recvFunctionalSnoop, recvAtomicSnoop and recvTimingSnoop have a default implementation that calls panic. This is to allow non-coherent master and slave ports to not implement these functions.
Diffstat (limited to 'src/cpu/o3/cpu.hh')
-rw-r--r--src/cpu/o3/cpu.hh2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index 493730458..be51f415f 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -149,6 +149,7 @@ class FullO3CPU : public BaseO3CPU
/** Timing version of receive. Handles setting fetch to the
* proper status to start fetching. */
virtual bool recvTiming(PacketPtr pkt);
+ virtual bool recvTimingSnoop(PacketPtr pkt) { return true; }
/** Handles doing a retry of a failed fetch. */
virtual void recvRetry();
@@ -176,6 +177,7 @@ class FullO3CPU : public BaseO3CPU
* completing the load or store that has returned from
* memory. */
virtual bool recvTiming(PacketPtr pkt);
+ virtual bool recvTimingSnoop(PacketPtr pkt);
/** Handles doing a retry of the previous send. */
virtual void recvRetry();