cpu: Physical register structural + flat indexing

Mimic the changes done on the architectural register indexes on the
physical register indexes. This is specific to the O3 model. The
structure, called PhysRegId, contains a register class, a register
index and a flat register index. The flat register index is kept
because it is useful in some cases where the type of register is not
important (dependency graph and scoreboard for example). Instead
of directly using the structure, most of the code is working with
a const PhysRegId* (typedef to PhysRegIdPtr). The actual PhysRegId
objects are stored in the regFile.

Change-Id: Ic879a3cc608aa2f34e2168280faac1846de77667
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2701
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

1 files changed, 8 insertions, 8 deletions

diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index abe036b09..b5cbc5fe2 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -411,21 +411,21 @@ class FullO3CPU : public BaseO3CPU
     void setMiscReg(int misc_reg, const TheISA::MiscReg &val,
             ThreadID tid);
 
-    uint64_t readIntReg(int reg_idx);
+    uint64_t readIntReg(PhysRegIdPtr phys_reg);
 
-    TheISA::FloatReg readFloatReg(int reg_idx);
+    TheISA::FloatReg readFloatReg(PhysRegIdPtr phys_reg);
 
-    TheISA::FloatRegBits readFloatRegBits(int reg_idx);
+    TheISA::FloatRegBits readFloatRegBits(PhysRegIdPtr phys_reg);
 
-    TheISA::CCReg readCCReg(int reg_idx);
+    TheISA::CCReg readCCReg(PhysRegIdPtr phys_reg);
 
-    void setIntReg(int reg_idx, uint64_t val);
+    void setIntReg(PhysRegIdPtr phys_reg, uint64_t val);
 
-    void setFloatReg(int reg_idx, TheISA::FloatReg val);
+    void setFloatReg(PhysRegIdPtr phys_reg, TheISA::FloatReg val);
 
-    void setFloatRegBits(int reg_idx, TheISA::FloatRegBits val);
+    void setFloatRegBits(PhysRegIdPtr phys_reg, TheISA::FloatRegBits val);
 
-    void setCCReg(int reg_idx, TheISA::CCReg val);
+    void setCCReg(PhysRegIdPtr phys_reg, TheISA::CCReg val);
 
     uint64_t readArchIntReg(int reg_idx, ThreadID tid);