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authorSteve Reinhardt <stever@eecs.umich.edu>2007-06-22 16:13:53 -0700
committerSteve Reinhardt <stever@eecs.umich.edu>2007-06-22 16:13:53 -0700
commited1db23b414a372a012d406d5a684775f00baa11 (patch)
tree1c706f022e2b84be0a01e5bc577075ba30276011 /src/cpu/o3/cpu.hh
parent4d1bcbcd36e5735e76b38abb151de716c31a2272 (diff)
parent16c1b5484f576b6aebea9ab5ffab4ea64f080de0 (diff)
downloadgem5-ed1db23b414a372a012d406d5a684775f00baa11.tar.xz
Merge vm1.(none):/home/stever/bk/newmem-head
into vm1.(none):/home/stever/bk/newmem-cache2 --HG-- extra : convert_revision : aa50af3094f5d459f75b514179b6e3ec5e0bf1df
Diffstat (limited to 'src/cpu/o3/cpu.hh')
-rw-r--r--src/cpu/o3/cpu.hh25
1 files changed, 18 insertions, 7 deletions
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index b7533e311..84a7c8673 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -434,22 +434,34 @@ class FullO3CPU : public BaseO3CPU
void setArchFloatRegInt(int reg_idx, uint64_t val, unsigned tid);
/** Reads the commit PC of a specific thread. */
- uint64_t readPC(unsigned tid);
+ Addr readPC(unsigned tid);
/** Sets the commit PC of a specific thread. */
void setPC(Addr new_PC, unsigned tid);
+ /** Reads the commit micro PC of a specific thread. */
+ Addr readMicroPC(unsigned tid);
+
+ /** Sets the commmit micro PC of a specific thread. */
+ void setMicroPC(Addr new_microPC, unsigned tid);
+
/** Reads the next PC of a specific thread. */
- uint64_t readNextPC(unsigned tid);
+ Addr readNextPC(unsigned tid);
/** Sets the next PC of a specific thread. */
- void setNextPC(uint64_t val, unsigned tid);
+ void setNextPC(Addr val, unsigned tid);
/** Reads the next NPC of a specific thread. */
- uint64_t readNextNPC(unsigned tid);
+ Addr readNextNPC(unsigned tid);
/** Sets the next NPC of a specific thread. */
- void setNextNPC(uint64_t val, unsigned tid);
+ void setNextNPC(Addr val, unsigned tid);
+
+ /** Reads the commit next micro PC of a specific thread. */
+ Addr readNextMicroPC(unsigned tid);
+
+ /** Sets the commit next micro PC of a specific thread. */
+ void setNextMicroPC(Addr val, unsigned tid);
/** Function to add instruction onto the head of the list of the
* instructions. Used when new instructions are fetched.
@@ -469,8 +481,7 @@ class FullO3CPU : public BaseO3CPU
/** Remove all instructions that are not currently in the ROB.
* There's also an option to not squash delay slot instructions.*/
- void removeInstsNotInROB(unsigned tid, bool squash_delay_slot,
- const InstSeqNum &delay_slot_seq_num);
+ void removeInstsNotInROB(unsigned tid);
/** Remove all instructions younger than the given sequence number. */
void removeInstsUntil(const InstSeqNum &seq_num,unsigned tid);