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| author | Arthur Perais <arthur.perais@inria.fr> | 2016-12-21 15:05:24 -0600 |
|---|---|---|
| committer | Arthur Perais <arthur.perais@inria.fr> | 2016-12-21 15:05:24 -0600 |
| commit | 1664625db89c3c9054434b5dc97a9f1c1bfad244 (patch) | |
| tree | 7fd4b62126246deccc2b3b21bf80e2e406d65b66 /src/cpu/o3/decode_impl.hh | |
| parent | e5fb6752d613a6f85e2f93b4c01836ac59a8c90c (diff) | |
| download | gem5-1664625db89c3c9054434b5dc97a9f1c1bfad244.tar.xz | |
cpu: Resolve targets of predicted 'taken' decode for O3
The target of taken conditional direct branches does not
need to be resolved in IEW: the target can be computed at
decode, usually using the decoded instruction word and the PC.
The higher-than-necessary penalty is taken only on conditional
branches that are predicted taken but miss in the BTB. Thus,
this is mostly inconsequential on IPC if the BTB is big/associative
enough (fewer capacity/conflict misses). Nonetheless, what gem5
simulates is not representative of how conditional branch targets
can be handled.
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/cpu/o3/decode_impl.hh')
| -rw-r--r-- | src/cpu/o3/decode_impl.hh | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/cpu/o3/decode_impl.hh b/src/cpu/o3/decode_impl.hh index ca56ac1e4..15ec76f5a 100644 --- a/src/cpu/o3/decode_impl.hh +++ b/src/cpu/o3/decode_impl.hh @@ -719,7 +719,11 @@ DefaultDecode<Impl>::decodeInsts(ThreadID tid) } // Go ahead and compute any PC-relative branches. - if (inst->isDirectCtrl() && inst->isUncondCtrl()) { + // This includes direct unconditional control and + // direct conditional control that is predicted taken. + if (inst->isDirectCtrl() && + (inst->isUncondCtrl() || inst->readPredTaken())) + { ++decodeBranchResolved; if (!(inst->branchTarget() == inst->readPredTarg())) { |