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author | Iru Cai <mytbk920423@gmail.com> | 2019-04-11 23:31:41 +0800 |
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committer | Iru Cai <mytbk920423@gmail.com> | 2019-04-12 00:24:57 +0800 |
commit | 8fe7e974ee5ca80885b9231ec397e5681d67d3ae (patch) | |
tree | 4b48ef2ccbbca57f0f4fd81bb8b2a318f2fe8c50 /src/cpu/o3/dyn_inst.hh | |
parent | 612ad09b9825a032742ae2a2de20628bac97154b (diff) | |
download | gem5-8fe7e974ee5ca80885b9231ec397e5681d67d3ae.tar.xz |
add IFT options
Diffstat (limited to 'src/cpu/o3/dyn_inst.hh')
-rw-r--r-- | src/cpu/o3/dyn_inst.hh | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh index 47dc830e0..d3c67c4cb 100644 --- a/src/cpu/o3/dyn_inst.hh +++ b/src/cpu/o3/dyn_inst.hh @@ -81,6 +81,7 @@ class BaseO3DynInst : public BaseDynInst<Impl> MaxInstSrcRegs = TheISA::MaxInstSrcRegs, //< Max source regs MaxInstDestRegs = TheISA::MaxInstDestRegs //< Max dest regs }; + bool isTainted; public: /** BaseDynInst constructor given a binary instruction. */ @@ -415,6 +416,29 @@ class BaseO3DynInst : public BaseDynInst<Impl> BaseDynInst<Impl>::setCCRegOperand(si, idx, val); } + void taintDestRegs(bool istaint) + { + isTainted = istaint; + for (size_t i = 0; i < this->numDestRegs(); i++) { + auto dstreg = _destRegIdx[i]; + if (istaint) { + cpu->setTaint(dstreg); + } else { + cpu->clearTaint(dstreg); + } + } + } + + bool srcTainted(void) + { + bool result = false; + for (size_t i = 0; i < this->numSrcRegs(); i++) { + auto src = _srcRegIdx[i]; + result |= cpu->regTainted(src); + } + return result; + } + #if THE_ISA == MIPS_ISA MiscReg readRegOtherThread(const RegId& misc_reg, ThreadID tid) { |