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| author | Gabe Black <gblack@eecs.umich.edu> | 2011-11-01 04:01:13 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2011-11-01 04:01:13 -0700 |
| commit | 1268e0df1f3d16d804b31005acf8067415771518 (patch) | |
| tree | 179079d7d6b441fc3ed06eb3e1aa5eedd0720610 /src/cpu/o3/dyn_inst.hh | |
| parent | eeb85a8575d4bff6bc054bafe295e8758f2d0ded (diff) | |
| download | gem5-1268e0df1f3d16d804b31005acf8067415771518.tar.xz | |
SE/FS: Expose the same methods on the CPUs in SE and FS modes.
Diffstat (limited to 'src/cpu/o3/dyn_inst.hh')
| -rw-r--r-- | src/cpu/o3/dyn_inst.hh | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh index e58eb99c5..1b101ede9 100644 --- a/src/cpu/o3/dyn_inst.hh +++ b/src/cpu/o3/dyn_inst.hh @@ -199,13 +199,11 @@ class BaseO3DynInst : public BaseDynInst<Impl> this->setFloatRegOperandBits(this->staticInst.get(), idx, this->cpu->readFloatRegBits(prev_phys_reg)); } } -#if FULL_SYSTEM /** Calls hardware return from error interrupt. */ Fault hwrei(); /** Traps to handle specified fault. */ void trap(Fault fault); bool simPalCheck(int palFunc); -#endif /** Emulates a syscall. */ void syscall(int64_t callnum); |