cpu: clean up architectural register classification

Move from a poorly documented scheme where the mapping
of unified architectural register indices to register
classes is hardcoded all over to one where there's an
enum for the register classes and a function that
encapsulates the mapping.

1 files changed, 17 insertions, 5 deletions

diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index 082c1f5d4..ece42b81a 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2010 ARM Limited
+ * Copyright (c) 2013 Advanced Micro Devices, Inc.
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -49,6 +50,7 @@
 #include "cpu/o3/isa_specific.hh"
 #include "cpu/base_dyn_inst.hh"
 #include "cpu/inst_seq.hh"
+#include "cpu/reg_class.hh"
 
 class Packet;
 
@@ -209,11 +211,21 @@ class BaseO3DynInst : public BaseDynInst<Impl>
 
         for (int idx = 0; idx < this->numDestRegs(); idx++) {
             PhysRegIndex prev_phys_reg = this->prevDestRegIdx(idx);
-            TheISA::RegIndex original_dest_reg = this->staticInst->destRegIdx(idx);
-            if (original_dest_reg <  TheISA::FP_Base_DepTag)
-                this->setIntRegOperand(this->staticInst.get(), idx, this->cpu->readIntReg(prev_phys_reg));
-            else if (original_dest_reg < TheISA::Ctrl_Base_DepTag)
-                this->setFloatRegOperandBits(this->staticInst.get(), idx, this->cpu->readFloatRegBits(prev_phys_reg));
+            TheISA::RegIndex original_dest_reg =
+                this->staticInst->destRegIdx(idx);
+            switch (regIdxToClass(original_dest_reg)) {
+              case IntRegClass:
+                this->setIntRegOperand(this->staticInst.get(), idx,
+                                       this->cpu->readIntReg(prev_phys_reg));
+                break;
+              case FloatRegClass:
+                this->setFloatRegOperandBits(this->staticInst.get(), idx,
+                                             this->cpu->readFloatRegBits(prev_phys_reg));
+                break;
+              case MiscRegClass:
+                // no need to forward misc reg values
+                break;
+            }
         }
     }
     /** Calls hardware return from error interrupt. */