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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-02-23 15:10:49 -0600 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-02-23 15:10:49 -0600 |
| commit | 68bd80794c8c72de9c1b447ab21e8c4c0a315ee3 (patch) | |
| tree | 92acb1e184bfa8d2965d468ca053eaff0d413c65 /src/cpu/o3/fetch.hh | |
| parent | e572cf93ee411ef40acdb64eb3073231619862ed (diff) | |
| download | gem5-68bd80794c8c72de9c1b447ab21e8c4c0a315ee3.tar.xz | |
O3: Fix bug when a squash occurs right before TLB miss returns.
In this case we need to throw away the TLB miss, not assume it was the
one we were waiting for.
Diffstat (limited to 'src/cpu/o3/fetch.hh')
| -rw-r--r-- | src/cpu/o3/fetch.hh | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh index 647c48a76..c51658104 100644 --- a/src/cpu/o3/fetch.hh +++ b/src/cpu/o3/fetch.hh @@ -522,6 +522,10 @@ class DefaultFetch * due to a squash. */ Stats::Scalar fetchIcacheSquashes; + /** Total number of outstanding tlb accesses that were dropped + * due to a squash. + */ + Stats::Scalar fetchTlbSquashes; /** Distribution of number of instructions fetched each cycle. */ Stats::Distribution fetchNisnDist; /** Rate of how often fetch was idle. */ |