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author | Gabe Black <gblack@eecs.umich.edu> | 2006-12-28 14:33:45 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-12-28 14:33:45 -0500 |
commit | 3f2b25d99725a8eafd495021a382b7a6ac90720e (patch) | |
tree | 3b48b67cdc21cc015c00d1b7f7efad1d2f0b7d8b /src/cpu/o3/fetch.hh | |
parent | d24f60788faa10f4a937288fd301158c1620318b (diff) | |
download | gem5-3f2b25d99725a8eafd495021a382b7a6ac90720e.tar.xz |
Phased out DelaySlotInfo.
--HG--
extra : convert_revision : ab48db10caf38137300da63078aa9360f46b9631
Diffstat (limited to 'src/cpu/o3/fetch.hh')
-rw-r--r-- | src/cpu/o3/fetch.hh | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh index 0371cd2bc..8347ed775 100644 --- a/src/cpu/o3/fetch.hh +++ b/src/cpu/o3/fetch.hh @@ -362,19 +362,6 @@ class DefaultFetch /** Tracks how many instructions has been fetched this cycle. */ int numInst; - /** Tracks delay slot information for threads in ISAs which use - * delay slots; - */ - struct DelaySlotInfo { - InstSeqNum delaySlotSeqNum; - InstSeqNum branchSeqNum; - int numInsts; - Addr targetAddr; - bool targetReady; - }; - - DelaySlotInfo delaySlotInfo[Impl::MaxThreads]; - /** Source of possible stalls. */ struct Stalls { bool decode; |