Phased out DelaySlotInfo.

--HG--
extra : convert_revision : ab48db10caf38137300da63078aa9360f46b9631

1 files changed, 0 insertions, 13 deletions

diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh
index 0371cd2bc..8347ed775 100644
--- a/src/cpu/o3/fetch.hh
+++ b/src/cpu/o3/fetch.hh
@@ -362,19 +362,6 @@ class DefaultFetch
     /** Tracks how many instructions has been fetched this cycle. */
     int numInst;
 
-    /** Tracks delay slot information for threads in ISAs which use
-     *	delay slots;
-     */
-    struct DelaySlotInfo {
-        InstSeqNum delaySlotSeqNum;
-        InstSeqNum branchSeqNum;
-        int numInsts;
-        Addr targetAddr;
-        bool targetReady;
-    };
-
-    DelaySlotInfo delaySlotInfo[Impl::MaxThreads];
-
     /** Source of possible stalls. */
     struct Stalls {
         bool decode;